src/soc/decoder/power_enums.py

   1 from enum import Enum, unique
   2 import csv
   3 import os
   4 from os.path import dirname, join
   5 from collections import namedtuple
   6
   7 def find_wiki_file(name):
   8     filedir = os.path.dirname(os.path.abspath(__file__))
   9     basedir = dirname(dirname(dirname(filedir)))
  10     tabledir = join(basedir, 'libreriscv')
  11     tabledir = join(tabledir, 'openpower')
  12     tabledir = join(tabledir, 'isatables')
  13
  14     file_path = join(tabledir, name)
  15     return file_path
  16
  17
  18 def get_csv(name):
  19     file_path = find_wiki_file(name)
  20     with open(file_path, 'r') as csvfile:
  21         reader = csv.DictReader(csvfile)
  22         return list(reader)
  23
  24
  25 # names of the fields in the tables that don't correspond to an enum
  26 single_bit_flags = ['CR in', 'CR out', 'inv A', 'inv out',
  27                     'cry out', 'BR', 'sgn ext', 'upd', 'rsrv', '32b',
  28                     'sgn', 'lk', 'sgl pipe']
  29
  30 # default values for fields in the table
  31 default_values = {'unit': "NONE", 'internal op': "OP_ILLEGAL",
  32                   'in1': "RA", 'in2': 'NONE', 'in3': 'NONE', 'out': 'NONE',
  33                   'ldst len': 'NONE',
  34                   'rc': 'NONE', 'cry in': 'ZERO', 'form': 'NONE'}
  35
  36
  37 def get_signal_name(name):
  38     if name[0].isdigit():
  39         name = "is_" + name
  40     return name.lower().replace(' ', '_')
  41
  42 # this corresponds to which Function Unit (pipeline-with-Reservation-Stations)
  43 # is to process and guard the operation.  they are roughly divided by having
  44 # the same register input/output signature (X-Form, etc.)
  45 @unique
  46 class Function(Enum):
  47     NONE = 0
  48     ALU = 1
  49     LDST = 2
  50     SHIFT_ROT = 3
  51     LOGICAL = 4
  52
  53
  54 @unique
  55 class Form(Enum):
  56     NONE = 0
  57     I = 1
  58     B = 2
  59     SC = 3
  60     D = 4
  61     DS = 5
  62     DQ = 6
  63     DX = 7
  64     X = 8
  65     XL = 9
  66     XFX = 10
  67     XFL = 11
  68     XX1 = 12
  69     XX2 = 13
  70     XX3 = 14
  71     XX4 = 15
  72     XS = 16
  73     XO = 17
  74     A = 18
  75     M = 19
  76     MD = 20
  77     MDS = 21
  78     VA = 22
  79     VC = 23
  80     VX = 24
  81     EVX = 25
  82     EVS = 26
  83     Z22 = 27
  84     Z23 = 28
  85
  86
  87 # Internal Operation numbering.  Add new opcodes here (FPADD, FPMUL etc.)
  88 @unique
  89 class InternalOp(Enum):
  90     OP_ILLEGAL = 0     # important that this is zero (see power_decoder.py)
  91     OP_NOP = 1
  92     OP_ADD = 2
  93     OP_ADDPCIS = 3
  94     OP_AND = 4
  95     OP_ATTN = 5
  96     OP_B = 6
  97     OP_BC = 7
  98     OP_BCREG = 8
  99     OP_BPERM = 9
 100     OP_CMP = 10
 101     OP_CMPB = 11
 102     OP_CMPEQB = 12
 103     OP_CMPRB = 13
 104     OP_CNTZ = 14
 105     OP_CRAND = 15
 106     OP_CRANDC = 16
 107     OP_CREQV = 17
 108     OP_CRNAND = 18
 109     OP_CRNOR = 19
 110     OP_CROR = 20
 111     OP_CRORC = 21
 112     OP_CRXOR = 22
 113     OP_DARN = 23
 114     OP_DCBF = 24
 115     OP_DCBST = 25
 116     OP_DCBT = 26
 117     OP_DCBTST = 27
 118     OP_DCBZ = 28
 119     OP_DIV = 29
 120     OP_DIVE = 30
 121     OP_EXTS = 31
 122     OP_EXTSWSLI = 32
 123     OP_ICBI = 33
 124     OP_ICBT = 34
 125     OP_ISEL = 35
 126     OP_ISYNC = 36
 127     OP_LOAD = 37
 128     OP_STORE = 38
 129     OP_MADDHD = 39
 130     OP_MADDHDU = 40
 131     OP_MADDLD = 41
 132     OP_MCRF = 42
 133     OP_MCRXR = 43
 134     OP_MCRXRX = 44
 135     OP_MFCR = 45
 136     OP_MFSPR = 46
 137     OP_MOD = 47
 138     OP_MTCRF = 48
 139     OP_MTSPR = 49
 140     OP_MUL_L64 = 50
 141     OP_MUL_H64 = 51
 142     OP_MUL_H32 = 52
 143     OP_OR = 53
 144     OP_POPCNT = 54
 145     OP_PRTY = 55
 146     OP_RLC = 56
 147     OP_RLCL = 57
 148     OP_RLCR = 58
 149     OP_SETB = 59
 150     OP_SHL = 60
 151     OP_SHR = 61
 152     OP_SYNC = 62
 153     OP_TD = 63
 154     OP_TDI = 64
 155     OP_TW = 65
 156     OP_TWI = 66
 157     OP_XOR = 67
 158     OP_SIM_CONFIG = 68
 159
 160
 161 @unique
 162 class In1Sel(Enum):
 163     NONE = 0
 164     RA = 1
 165     RA_OR_ZERO = 2
 166     SPR = 3
 167
 168
 169 @unique
 170 class In2Sel(Enum):
 171     NONE = 0
 172     RB = 1
 173     CONST_UI = 2
 174     CONST_SI = 3
 175     CONST_UI_HI = 4
 176     CONST_SI_HI = 5
 177     CONST_LI = 6
 178     CONST_BD = 7
 179     CONST_DS = 8
 180     CONST_M1 = 9
 181     CONST_SH = 10
 182     CONST_SH32 = 11
 183     SPR = 12
 184
 185
 186 @unique
 187 class In3Sel(Enum):
 188     NONE = 0
 189     RS = 1
 190
 191
 192 @unique
 193 class OutSel(Enum):
 194     NONE = 0
 195     RT = 1
 196     RA = 2
 197     SPR = 3
 198
 199
 200 @unique
 201 class LdstLen(Enum):
 202     NONE = 0
 203     is1B = 1
 204     is2B = 2
 205     is4B = 3
 206     is8B = 4
 207
 208
 209 @unique
 210 class RC(Enum):
 211     NONE = 0
 212     ONE = 1
 213     RC = 2
 214
 215
 216 @unique
 217 class CryIn(Enum):
 218     ZERO = 0
 219     ONE = 1
 220     CA = 2
 221
 222
 223 # SPRs - Special-Purpose Registers.  See V3.0B Figure 18 p971 and
 224 # http://libre-riscv.org/openpower/isatables/sprs.csv
 225 # http://bugs.libre-riscv.org/show_bug.cgi?id=261
 226
 227 spr_csv = get_csv("sprs.csv")
 228 spr_info = namedtuple('spr_info', 'SPR priv_mtspr priv_mfspr length')
 229 spr_dict = {}
 230 for row in spr_csv:
 231     info = spr_info(SPR=row['SPR'], priv_mtspr=row['priv_mtspr'],
 232                     priv_mfspr=row['priv_mfspr'], length=int(row['len']))
 233     spr_dict[int(row['Idx'])] = info
 234 fields = [(row['SPR'], int(row['Idx'])) for row in spr_csv]
 235 SPR = Enum('SPR', fields)
 236
 237
 238 XER_bits = {
 239     'SO': 32,
 240     'OV': 33,
 241     'CA': 34,
 242     'OV32': 44,
 243     'CA32': 45
 244     }