src/soc/decoder/power_pseudo.py

   1 # Based on GardenSnake - a parser generator demonstration program
   2 # GardenSnake was released into the Public Domain by Andrew Dalke.
   3
   4 # Portions of this work are derived from Python's Grammar definition
   5 # and may be covered under the Python copyright and license
   6 #
   7 #          Andrew Dalke / Dalke Scientific Software, LLC
   8 #             30 August 2006 / Cape Town, South Africa
   9
  10 # Modifications for inclusion in PLY distribution
  11 import sys
  12 from pprint import pprint
  13 from copy import copy
  14 from ply import lex, yacc
  15 import astor
  16 import ast
  17
  18 from soc.decoder.power_decoder import create_pdecode
  19 from nmigen.back.pysim import Simulator, Delay
  20 from nmigen import Module, Signal
  21
  22 from soc.decoder.pseudo.parser import GardenSnakeCompiler
  23 from soc.decoder.selectable_int import SelectableInt, selectconcat
  24
  25 ####### Test code #######
  26
  27 bpermd = r"""
  28 perm <- [0] * 8
  29 if index < 64:
  30     index <- (RS)[8*i:8*i+7]
  31 RA <- [0]*56 || perm[0:7]
  32 print (RA)
  33 """
  34
  35 bpermd = r"""
  36 if index < 64 then index <- 0
  37 else index <- 5
  38 do while index < 5
  39     index <- 0
  40     leave
  41 for i = 0 to 7
  42     index <- 0
  43 """
  44
  45 _bpermd = r"""
  46 for i = 0 to 7
  47    index <- (RS)[8*i:8*i+7]
  48    if index < 64 then
  49         permi <- (RB)[index]
  50    else
  51         permi <- 0
  52 RA <- [0]*56|| perm[0:7]
  53 """
  54
  55 cnttzd = """
  56 n  <- 0
  57 do while n < 64
  58     if (RS)[63-n] = 0b1 then
  59         leave
  60     n  <- n + 1
  61 RA <- EXTZ64(n)
  62 print (RA)
  63 """
  64
  65 cmpi = """
  66 if      a < EXTS(SI) then
  67     c <- 0b100
  68 else if a > EXTS(SI) then
  69     c <- 0b010
  70 """
  71
  72 #code = testreg
  73 #code = cnttzd
  74 code = cmpi
  75 #code = bpermd
  76
  77 def tolist(num):
  78     l = []
  79     for i in range(64):
  80         l.append(1 if (num & (1<<i)) else 0)
  81     l.reverse()
  82     return l
  83
  84
  85 def get_reg_hex(reg):
  86     return hex(reg.value)
  87
  88
  89 class GPR(dict):
  90     def __init__(self, sd, regfile):
  91         dict.__init__(self)
  92         self.sd = sd
  93         self.regfile = regfile
  94         for i in range(32):
  95             self[i] = SelectableInt(0, 64)
  96
  97     def set_form(self, form):
  98         self.form = form
  99
 100     def ___getitem__(self, attr):
 101         print ("GPR getitem", attr)
 102         getform = self.sd.sigforms[self.form]
 103         rnum = getattr(getform, attr)
 104         print ("GPR get", rnum, rnum, dir(rnum))
 105         l = list(rnum)
 106         print (l[0]._as_const())
 107         #for x in rnum:
 108             #print (x, x.value, dir(x))
 109             #print (x.value, dir(x.value))
 110         print (list(rnum))
 111         return self.regfile[rnum]
 112
 113
 114 def convert_to_python(pcode):
 115
 116     gsc = GardenSnakeCompiler()
 117
 118     tree = gsc.compile(pcode, mode="exec", filename="string")
 119     tree = ast.fix_missing_locations(tree)
 120     return astor.to_source(tree)
 121
 122
 123 def test():
 124
 125     gsc = GardenSnakeCompiler()
 126
 127     # XXX unused!  see GPR instead
 128     gsc.regfile = {}
 129     for i in range(32):
 130         gsc.regfile[i] = 0
 131     gsc.gpr = GPR(gsc.parser.sd, gsc.regfile)
 132
 133     _compile = gsc.compile
 134
 135     tree = _compile(code, mode="single", filename="string")
 136     tree = ast.fix_missing_locations(tree)
 137     print ( ast.dump(tree) )
 138
 139     print ("astor dump")
 140     print (astor.dump_tree(tree))
 141     print ("to source")
 142     source = astor.to_source(tree)
 143     print (source)
 144
 145     #sys.exit(0)
 146
 147     # Set up the GardenSnake run-time environment
 148     def print_(*args):
 149         print ("args", args)
 150         print ("-->", " ".join(map(str,args)))
 151
 152     from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,)
 153
 154     d = {}
 155     d["print"] = print_
 156     d["EXTS64"] = EXTS64
 157     d["EXTZ64"] = EXTZ64
 158     d["SelectableInt"] = SelectableInt
 159     d["concat"] = selectconcat
 160     d["GPR"] = gsc.gpr
 161
 162     form = 'X'
 163     gsc.gpr.set_form(form)
 164     getform = gsc.parser.sd.sigforms[form]._asdict()
 165     #print ("getform", form)
 166     #for k, f in getform.items():
 167         #print (k, f)
 168         #d[k] = getform[k]
 169
 170     compiled_code = compile(source, mode="exec", filename="<string>")
 171
 172     m = Module()
 173     comb = m.d.comb
 174     instruction = Signal(32)
 175
 176     m.submodules.decode = decode =  gsc.parser.sd
 177     comb += decode.raw_opcode_in.eq(instruction)
 178     sim = Simulator(m)
 179
 180     instr = [0x11111117]
 181
 182     def process():
 183         for ins in instr:
 184             print("0x{:X}".format(ins & 0xffffffff))
 185
 186             # ask the decoder to decode this binary data (endian'd)
 187             yield decode.bigendian.eq(0)  # little / big?
 188             yield instruction.eq(ins)          # raw binary instr.
 189             yield Delay(1e-6)
 190
 191             # read regs, drop them into dict for function
 192             for rname in gsc.parser.read_regs:
 193                 regidx = yield getattr(decode.sigforms['X'], rname)
 194                 d[rname] = gsc.gpr[regidx]
 195                 print ("read reg", rname, regidx, get_reg_hex(d[rname]))
 196
 197             exec (compiled_code, d)
 198             print ("Done")
 199
 200             print (d.keys())
 201
 202             print (decode.sigforms['X'])
 203             x = yield decode.sigforms['X'].RS
 204             ra = yield decode.sigforms['X'].RA
 205             print ("RA", ra, d['RA'])
 206             print ("RS", x)
 207
 208             for wname in gsc.parser.write_regs:
 209                 reg = getform[wname]
 210                 print ("write regs", wname, d[wname], reg)
 211                 regidx = yield reg
 212                 gsc.gpr[regidx] = d[wname]
 213
 214     sim.add_process(process)
 215     with sim.write_vcd("simulator.vcd", "simulator.gtkw",
 216                        traces=decode.ports()):
 217         sim.run()
 218
 219     for i in range(len(gsc.gpr)):
 220         print ("regfile", i, get_reg_hex(gsc.gpr[i]))
 221
 222
 223 if __name__ == '__main__':
 224     test()