add divwe regression test case
[soc.git] / src / soc / fu / div / test / test_pipe_caller.py
1 import random
2 import unittest
3 from soc.simulator.program import Program
4 from soc.config.endian import bigendian
5
6 from soc.fu.test.common import (TestCase, TestAccumulatorBase, skip_case)
7 from soc.fu.div.pipe_data import DivPipeKind
8
9 from soc.fu.div.test.helper import (log_rand, get_cu_inputs,
10 set_alu_inputs, DivTestHelper)
11
12
13 class DivTestCases(TestAccumulatorBase):
14 def case_divwe_regression(self):
15 # div FU and power-instruction-analyzer both correctly return 0
16 # hitting behavior undefined by Power v3.1 spec, need to adjust
17 # simulator API to tell tests that the simulator's output doesn't
18 # need to completely match
19 lst = [f"divwe 3, 1, 2"]
20 initial_regs = [0] * 32
21 initial_regs[1] = 1
22 initial_regs[2] = 1
23 with Program(lst, bigendian) as prog:
24 self.add_case(prog, initial_regs)
25
26 def case_divw_regression(self):
27 # simulator is wrong, FSM and power-instruction-analyzer both correct
28 lst = [f"divw 0, 1, 2"]
29 initial_regs = [0] * 32
30 initial_regs[2] = 0x2
31 initial_regs[1] = 0x80000000
32 with Program(lst, bigendian) as prog:
33 self.add_case(prog, initial_regs)
34
35 # modulo
36 def case_modsd_regression2(self):
37 lst = [f"modsd 0, 1, 2"]
38 initial_regs = [0] * 32
39 initial_regs[2] = 0xff
40 initial_regs[1] = 0x7fffffffffffffff
41 with Program(lst, bigendian) as prog:
42 self.add_case(prog, initial_regs)
43
44 # modulo
45 def case_modsd_regression(self):
46 lst = [f"modsd 17, 27, 0"]
47 initial_regs = [0] * 32
48 initial_regs[0] = 0xff
49 initial_regs[27] = 0x7fffffffffffffff
50 with Program(lst, bigendian) as prog:
51 self.add_case(prog, initial_regs)
52
53 def case_divduo_regression(self):
54 lst = [f"divduo. 11, 20, 6"]
55 initial_regs = [0] * 32
56 # gpr: 00ff00ff00ff0080 <- r6
57 # gpr: 000000000000007f <- r11
58 # gpr: 7f6e5d4c3b2a1908 <- r20
59 initial_regs[6] = 0x00ff00ff00ff0080
60 initial_regs[20] = 0x7f6e5d4c3b2a1908
61 with Program(lst, bigendian) as prog:
62 self.add_case(prog, initial_regs)
63
64 def case_0_regression(self):
65 for i in range(40):
66 lst = ["divwo 3, 1, 2"]
67 initial_regs = [0] * 32
68 initial_regs[1] = 0xbc716835f32ac00c
69 initial_regs[2] = 0xcdf69a7f7042db66
70 with Program(lst, bigendian) as prog:
71 self.add_case(prog, initial_regs)
72
73 def case_1_regression(self):
74 lst = ["divwo 3, 1, 2"]
75 initial_regs = [0] * 32
76 initial_regs[1] = 0x10000000000000000-4
77 initial_regs[2] = 0x10000000000000000-2
78 with Program(lst, bigendian) as prog:
79 self.add_case(prog, initial_regs)
80
81 def case_2_regression(self):
82 lst = ["divwo 3, 1, 2"]
83 initial_regs = [0] * 32
84 initial_regs[1] = 0xffffffffffff9321
85 initial_regs[2] = 0xffffffffffff7012
86 with Program(lst, bigendian) as prog:
87 self.add_case(prog, initial_regs)
88
89 def case_3_regression(self):
90 lst = ["divwo. 3, 1, 2"]
91 initial_regs = [0] * 32
92 initial_regs[1] = 0x1b8e32f2458746af
93 initial_regs[2] = 0x6b8aee2ccf7d62e9
94 with Program(lst, bigendian) as prog:
95 self.add_case(prog, initial_regs)
96
97 def case_4_regression(self):
98 lst = ["divw 3, 1, 2"]
99 initial_regs = [0] * 32
100 initial_regs[1] = 0x1c4e6c2f3aa4a05c
101 initial_regs[2] = 0xe730c2eed6cc8dd7
102 with Program(lst, bigendian) as prog:
103 self.add_case(prog, initial_regs)
104
105 def case_5_regression(self):
106 lst = ["divw 3, 1, 2",
107 "divwo. 6, 4, 5"]
108 initial_regs = [0] * 32
109 initial_regs[1] = 0x1c4e6c2f3aa4a05c
110 initial_regs[2] = 0xe730c2eed6cc8dd7
111 initial_regs[4] = 0x1b8e32f2458746af
112 initial_regs[5] = 0x6b8aee2ccf7d62e9
113 with Program(lst, bigendian) as prog:
114 self.add_case(prog, initial_regs)
115
116 def case_6_regression(self):
117 # CR0 not getting set properly for this one
118 # turns out that overflow is not set correctly in
119 # fu/div/output_stage.py calc_overflow
120 # https://bugs.libre-soc.org/show_bug.cgi?id=425
121 lst = ["divw. 3, 1, 2"]
122 initial_regs = [0] * 32
123 initial_regs[1] = 0x61c1cc3b80f2a6af
124 initial_regs[2] = 0x9dc66a7622c32bc0
125 with Program(lst, bigendian) as prog:
126 self.add_case(prog, initial_regs)
127
128 def case_7_regression(self):
129 # https://bugs.libre-soc.org/show_bug.cgi?id=425
130 lst = ["divw. 3, 1, 2"]
131 initial_regs = [0] * 32
132 initial_regs[1] = 0xf1791627e05e8096
133 initial_regs[2] = 0xffc868bf4573da0b
134 with Program(lst, bigendian) as prog:
135 self.add_case(prog, initial_regs)
136
137 def case_8_fsm_regression(self): # FSM result is "36" not 6
138 lst = ["divwu. 3, 1, 2"]
139 initial_regs = [0] * 32
140 initial_regs[1] = 18
141 initial_regs[2] = 3
142 with Program(lst, bigendian) as prog:
143 self.add_case(prog, initial_regs)
144
145 def case_9_regression(self): # CR0 fails: expected 0b10, actual 0b11
146 lst = ["divw. 3, 1, 2"]
147 initial_regs = [0] * 32
148 initial_regs[1] = 1
149 initial_regs[2] = 0
150 with Program(lst, bigendian) as prog:
151 self.add_case(prog, initial_regs)
152
153 def case_10_regression(self): # overflow fails
154 lst = ["divwo 3, 1, 2"]
155 initial_regs = [0] * 32
156 initial_regs[1] = 0xbc716835f32ac00c
157 initial_regs[2] = 0xcdf69a7f7042db66
158 with Program(lst, bigendian) as prog:
159 self.add_case(prog, initial_regs)
160
161 def case_11_regression(self):
162 lst = ["divwo. 3, 1, 2"]
163 initial_regs = [0] * 32
164 initial_regs[1] = 0xffffffffffffffff
165 initial_regs[2] = 0xffffffffffffffff
166 with Program(lst, bigendian) as prog:
167 self.add_case(prog, initial_regs)
168
169 def case_divw_by_zero_1(self):
170 lst = ["divw. 3, 1, 2"]
171 initial_regs = [0] * 32
172 initial_regs[1] = 0x1
173 initial_regs[2] = 0x0
174 with Program(lst, bigendian) as prog:
175 self.add_case(prog, initial_regs)
176
177 def case_divw_overflow2(self):
178 lst = ["divw. 3, 1, 2"]
179 initial_regs = [0] * 32
180 initial_regs[1] = 0x80000000
181 initial_regs[2] = 0xffffffffffffffff # top bits don't seem to matter
182 with Program(lst, bigendian) as prog:
183 self.add_case(prog, initial_regs)
184
185 def case_divw_overflow3(self):
186 lst = ["divw. 3, 1, 2"]
187 initial_regs = [0] * 32
188 initial_regs[1] = 0x80000000
189 initial_regs[2] = 0xffffffff
190 with Program(lst, bigendian) as prog:
191 self.add_case(prog, initial_regs)
192
193 def case_divwuo_regression_1(self):
194 lst = ["divwuo. 3, 1, 2"]
195 initial_regs = [0] * 32
196 initial_regs[1] = 0x7591a398c4e32b68
197 initial_regs[2] = 0x48674ab432867d69
198 with Program(lst, bigendian) as prog:
199 self.add_case(prog, initial_regs)
200
201 def case_divwuo_1(self):
202 lst = ["divwuo. 3, 1, 2"]
203 initial_regs = [0] * 32
204 initial_regs[1] = 0x50
205 initial_regs[2] = 0x2
206 with Program(lst, bigendian) as prog:
207 self.add_case(prog, initial_regs)
208
209 def case_rand_divwu(self):
210 insns = ["divwu", "divwu.", "divwuo", "divwuo."]
211 for i in range(40):
212 choice = random.choice(insns)
213 lst = [f"{choice} 3, 1, 2"]
214 initial_regs = [0] * 32
215 initial_regs[1] = log_rand(32)
216 initial_regs[2] = log_rand(32)
217 with Program(lst, bigendian) as prog:
218 self.add_case(prog, initial_regs)
219
220 def case_rand_divw(self):
221 insns = ["divw", "divw.", "divwo", "divwo."]
222 for i in range(40):
223 choice = random.choice(insns)
224 lst = [f"{choice} 3, 1, 2"]
225 initial_regs = [0] * 32
226 initial_regs[1] = log_rand(32)
227 initial_regs[2] = log_rand(32)
228 with Program(lst, bigendian) as prog:
229 self.add_case(prog, initial_regs)
230
231
232 class TestPipe(DivTestHelper):
233 def test_div_pipe_core(self):
234 self.run_all(DivTestCases().test_data,
235 DivPipeKind.DivPipeCore, "div_pipe_caller")
236
237 def test_fsm_div_core(self):
238 self.run_all(DivTestCases().test_data,
239 DivPipeKind.FSMDivCore, "div_pipe_caller")
240
241 def test_sim_only(self):
242 self.run_all(DivTestCases().test_data,
243 DivPipeKind.SimOnly, "div_pipe_caller")
244
245
246 if __name__ == "__main__":
247 unittest.main()