2 # Copyright (C) 2020 Michael Nolan <mtnolan2640@gmail.com>
3 # Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
5 # This stage is intended to do most of the work of executing shift
6 # instructions, as well as carry and overflow generation. This module
7 # however should not gate the carry or overflow, that's up to the
9 from nmigen
import (Module
, Signal
, Cat
, Repl
, Mux
, Const
)
10 from nmutil
.pipemodbase
import PipeModBase
11 from soc
.fu
.shift_rot
.pipe_data
import (ShiftRotOutputData
,
13 from nmutil
.lut
import BitwiseLut
14 from openpower
.decoder
.power_enums
import MicrOp
15 from soc
.fu
.shift_rot
.rotator
import Rotator
17 from openpower
.decoder
.power_fields
import DecodeFields
18 from openpower
.decoder
.power_fieldsn
import SignalBitRange
21 class ShiftRotMainStage(PipeModBase
):
22 def __init__(self
, pspec
):
23 super().__init
__(pspec
, "main")
24 self
.fields
= DecodeFields(SignalBitRange
, [self
.i
.ctx
.op
.insn
])
25 self
.fields
.create_specs()
28 return ShiftRotInputData(self
.pspec
)
31 return ShiftRotOutputData(self
.pspec
)
33 def elaborate(self
, platform
):
39 bitwise_lut
= BitwiseLut(input_count
=3, width
=64)
40 m
.submodules
.bitwise_lut
= bitwise_lut
41 comb
+= bitwise_lut
.inputs
[0].eq(self
.i
.rb
)
42 comb
+= bitwise_lut
.inputs
[1].eq(self
.i
.ra
)
43 comb
+= bitwise_lut
.inputs
[2].eq(self
.i
.rc
)
45 # NOTE: the sh field immediate is read in by PowerDecode2
46 # (actually DecodeRB), whereupon by way of rb "immediate" mode
47 # it ends up in self.i.rb.
49 # obtain me and mb fields from instruction.
50 m_fields
= self
.fields
.instrs
['M']
51 md_fields
= self
.fields
.instrs
['MD']
52 mb
= Signal(m_fields
['MB'][0:-1].shape())
53 me
= Signal(m_fields
['ME'][0:-1].shape())
54 mb_extra
= Signal(1, reset_less
=True)
55 comb
+= mb
.eq(m_fields
['MB'][0:-1])
56 comb
+= me
.eq(m_fields
['ME'][0:-1])
57 comb
+= mb_extra
.eq(md_fields
['mb'][0:-1][0])
59 # set up microwatt rotator module
60 m
.submodules
.rotator
= rotator
= Rotator()
64 rotator
.mb_extra
.eq(mb_extra
),
65 rotator
.rs
.eq(self
.i
.rs
),
66 rotator
.ra
.eq(self
.i
.a
),
67 rotator
.shift
.eq(self
.i
.rb
), # can also be sh (in immediate mode)
68 rotator
.is_32bit
.eq(op
.is_32bit
),
69 rotator
.arith
.eq(op
.is_signed
),
72 comb
+= o
.ok
.eq(1) # defaults to enabled
74 # outputs from the microwatt rotator module
75 comb
+= [o
.data
.eq(rotator
.result_o
),
76 self
.o
.xer_ca
.data
.eq(Repl(rotator
.carry_out_o
, 2))]
78 # instruction rotate type
79 mode
= Signal(4, reset_less
=True)
80 with m
.Switch(op
.insn_type
):
81 with m
.Case(MicrOp
.OP_SHL
):
82 comb
+= mode
.eq(0b0000) # L-shift
83 with m
.Case(MicrOp
.OP_SHR
):
84 comb
+= mode
.eq(0b0001) # R-shift
85 with m
.Case(MicrOp
.OP_RLC
):
86 comb
+= mode
.eq(0b0110) # clear LR
87 with m
.Case(MicrOp
.OP_RLCL
):
88 comb
+= mode
.eq(0b0010) # clear L
89 with m
.Case(MicrOp
.OP_RLCR
):
90 comb
+= mode
.eq(0b0100) # clear R
91 with m
.Case(MicrOp
.OP_EXTSWSLI
):
92 comb
+= mode
.eq(0b1000) # L-ext
93 with m
.Case(MicrOp
.OP_TERNLOG
):
94 # TODO: this only works for ternaryi, change to get lut value
95 # from register when we implement other variants
96 comb
+= bitwise_lut
.lut
.eq(self
.fields
.FormTLI
.TLI
[:])
97 comb
+= o
.data
.eq(bitwise_lut
.output
)
98 comb
+= self
.o
.xer_ca
.data
.eq(0)
100 comb
+= o
.ok
.eq(0) # otherwise disable
102 comb
+= Cat(rotator
.right_shift
,
105 rotator
.sign_ext_rs
).eq(mode
)
107 ###### sticky overflow and context, both pass-through #####
109 comb
+= self
.o
.xer_so
.data
.eq(self
.i
.xer_so
)
110 comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)