| 2021-12-12 |
Luke Kenneth Casson... | print debugs established that when a wb_get memory...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | set fetch_failed into PowerDecoder2 combinatorially
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | in a terrible botched way, get at I-Cache and set it up
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | fix bug in unit test, forgot that wb_get mem dict is...
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | get FetchUnitInterface I-Cache test working (sort-of)
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | comment out broken test
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | whoops forgot to add pspec
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | add start of test_loadstore1_ifetch_unit_interface()
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | connect up I-Cache to FetchUnitInterface
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | add new ConfigFetchUnit option "mmu_cache_wb" which...
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add some examination of the failed-fetched instruction
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add some debug string info to gtkwave
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add I-Cache to FSM local variables
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | wire fetch_failed from I-Cache to PowerDecoder2
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | make icache accessible to core, working back to TestIssuer
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | include SPR.TB in SPR FU
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | got fed up of staring at magic constants in the MMU
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add special pagetable to ifetch_invalid with execute...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | do not try priv_mode on the instruction fetch (not...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add an example pagetable where executable permission...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | check that no exception occurs in the virtual-memory...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add OP_FETCH_FAILED to MMU Function Unit
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | make LoadStore1 intsr_fault a "captured flag" - strictly...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | remove MSR and add CIA to MMU Input Record
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add instr_fault to LoadStore1 FSM
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add new PortInterfaceBase external_busy() option
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | complete the i-cache fetch through the MMU, including...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | set separate "iside" signal in LoadStore1 to not confuse it
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | start extending icache loadstore test
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | whoops another serious error in the CacheTagArray
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add first i-cache fetch (non-virtual), no MMU lookup...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | code-comments
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add in I-Cache into LoadStore1 - presently unused ...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add discussion links and bugreport
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | invert mmureq statements
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | submodule tidyup
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | tidyup, comments
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | debug print
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | another major bug, CacheTagArray valid was only 1 bit...
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | tidyup: move hit_set to DCachePendingHit in dcache.py
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | dcache.py tidyup
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | rename dtlb to dtlb_valid and tidyup
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | convert TLBArray to TLBValidArray
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | convert DTLBUpdate to use a pair of Memorys
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | more signals local to DTLBUpdate
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | more signals local to DTLBUpdate
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | update DTLBUpdate to reflect internal API now
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | ooo nasty bug. used tlb_hit.way instead of tlb_hit...
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | move DTLB Tags/Valids/PTEs into DTLBUpdate module
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | start moving TLBArray into DTLBUpdate
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | PLRUs were selecting an output index, only one selected
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | repeated copies of read/write addr/sel to Cache SRAMs
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | move bank of PLRUs to their own submodule in both dcache...
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | code-comments
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | use binary-to-unary encoders in dcache.py
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | global (one) do_read signal in cache_rams dcache.py
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | use one-hot binary-to-unary in dcache.py
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | use i_in.req to gate hit_way via Decoder in icache.py
|
commit | commitdiff | tree |
| 2021-12-06 |
Luke Kenneth Casson... | use Decoder (binary-to-unary) in icache.py to deal...
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use unary encoding (one-hot) for replace_way hit_way...
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | code-comments
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | whitespace and minor cleanup of D-Cache
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | more use of TLBHit Record in D-Cache
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | correct tlb_hit_way and index sizes, use TLBHit Record...
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use TLBRecord in D-Cache for which TLB is selected
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | split out TLBRecord, correct number of valid bits
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use Record in DCache for TLB
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use Record in D-Cache Cache Tags
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use Record for I-Cache Cache Tag/Valid
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | use Record for ICache TLB
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | sorting out test_mmu_dcache.py to use wb_get
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | convert icache.py to standard wishbone Interface
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | fake up wishbone stall signal in icache.
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | fix icache row store issue
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | using same tag/row functions as in dcache.py
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | more signal sizes in icache.py
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | incorrect Signal sizes in icache.py,
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | sorting out icache.py, used to work
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | remove redundant code
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | add I-Cache standard bus (not used yet)
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | remove yet another duplicate copy of wb_get, possible...
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | replace yet another duplicate copy of wb_get, possible...
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | wishbone bus convert on dcache
|
commit | commitdiff | tree |
| 2021-12-05 |
Luke Kenneth Casson... | correct import of wg_get function
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | remove yet another duplicated copy of wb_get and add...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | rename function which needs replacing
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | should have been using common version of wb_get, not...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | should not have been duplicating wb_get function in...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | get test_mmu_dcache.py working again
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | remove wb_get, should not have been duplicated
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | remove wb_get, should not have been massively duplicated...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | fix return results from pi_ld
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | wark-wark, broke mmu with removing rin. reverted
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | tidyup, comments
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | tidyup mmu
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | sigh in MMU FSM use direct access to ldst.dar/dsisr...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | remove DAR from PortInterface (where is the data going...
|
commit | commitdiff | tree |
| 2021-12-04 |
Luke Kenneth Casson... | stop using dar_o from PortInterface, get DAR directly...
|
commit | commitdiff | tree |
| next |
projects / soc.git / search