| 2020-06-19 |
Luke Kenneth Casson... | auto-assign needs to use concat / selectconcat
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | whoops detected page name wrong, for special case fixedshift
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | bit of a mess. getting carry recognised and output...
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add auto-assign mode detecting uninitialised variable...
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | div needs to be floordiv
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add true and floor div to SelectableInt
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add simulator test for divw
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | do mix-in for test_sim.py so that jacob can write some...
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add TODO comments to upgrade L0CacheBuffer to a new...
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commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | parameterise LoadStoreUnitInterface to be expandable
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | enable general test cases in test_issuer
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | got loop example operational by noting when PC fastreg...
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | use different way to pass instructions to test_issuer...
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | debugging test_issuer.py general test cases
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | get instructions immediately from assembly code
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | move test_sim.py unit tests to different class (split)
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | slightly hacky way to keep an eye on the PC
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | whoops generate core ilang not TestIssuer
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | use while / exception in test_compunit loop
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commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | investigating mtocrf/mtcrf issue
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add bug reference to mtocrf/mtcrf name decoding
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | decoding assembly instruction name, move to separate...
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | getting sim instruction decoder to reproduce asm instruction...
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | update submodule
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add comment/assembly decode in power enums
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | update test_sim.py to do a simple execution loop: decode...
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add loop example, required a bit of munging.
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | get fu compunit test to use ISACaller instruction-memory
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | got fed up of adding arguments to ISACaller / ISA,...
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | split execute and setup of ISACaller instruction execution
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | comment ISACaller setup
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | start to add in independent execution into ISACaller
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add a fake program counter to ISACaller
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | use an independent power decoder in ISACaller
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add "respect_pc" boolean to ISACaller
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add optional instruction memory
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | split out TestIssuer into separate module
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | remove unneeded yield
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | enable all tests again in test_core.py and test_issuer.py
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | got test_issuer FSM operating. bit of a hack
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | debugging test_issuer, getting FSM working
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commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | output to issuer_simulator.vcd
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add first version unit test for TestIssuer
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | reduce instruction depth to 6 bits in TestIssuer
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move debug statements to check function
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | hack LD/ST ad/st together, allow PC to be set externally
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move check regs in simple core to separate function
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move test core reg set up into separate function
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | set up a TestIssuer class with a FSM for doing instruction...
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add ports to TestMemory
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add beginnings of TestIssuer class, to issue instructions...
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | weird: adding TestMemory with no port causes nmigen...
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | refer to signals directly in Test Core
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add test instruction memory SRAM
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commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | update popcount docstring
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | start trying to fill in some comments in Minerva L1...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whitespace cleanup
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | imports and syntax errors fixed (found test_cache.py)
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | more whitespace
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | more whitespace on minerva (no unit tests, so cannot...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whitespace cleanup, remove minerva DataSelector class
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | have to set up addr/st rel-go link before setting up...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | add in memory setup/check but disable LDST Unit Tests...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | move setup/check memory into helper functions for use...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whoops LDSTCompUnit was identified as a Function.ALU...
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commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | add in TstL0CacheBuffer but disable temporarily
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add optional LDSTFunctionUnit to compunits
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | unit tests showing byte-reverse works
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add sim-qemu test for byte-reversed LD/ST
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add in byte-reverse from op PowerDecode2 field
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | error in address width (truncated) in setting up L0CacheBuffer
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | error in naming that ended up in gtkwave from a proxy
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add another LD/ST example to qemu-sim test,
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add byte-reversal on LD and ST in L0CacheBuffer
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commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | reasonably certain that the careful and slow use of...
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | first cut at qemu memory dump and compare
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | note possible BE/LE mode needed for memory reads/writes
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | update ld/st test to see what is going on
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | tracking down what looks like an error in the Simulator...
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | debug printout of sim and hardware memory, shows mismatch...
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commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | use ALUHelpers in LDSTCompUnit test
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | some ugly hacks that get LD/ST immediate working
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | even more complexity in CompALUMulti, to deal with...
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | must distinguish between rd/write xer_ca sim helpers
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | fixing get_rd_sim_xer_ca, has to only read carry if...
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | yield needed for unit tests to work (has to go)
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | read and write version of get_sim_xer_ca are different
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | use ALUHelpers in shift_rot
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | add fast spr1/2 sim ALUHelpers
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commit | commitdiff | tree |
| 2020-06-11 |
Luke Kenneth Casson... | rename get_sim_cr_a to get_wr_sim_cr_a for now
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | move Decode2ToExecute1Type to separate module
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | whitespace
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | link ST.go directly to ST.rel
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | rename unit test function in ld/st compalu_multi
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | hmmm very confused about LD/ST CompUnit unit test
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | wrong data structure being imported, duplicate CompLDSTOpSubset
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | remove old code
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | set data_len in compldst_multi unit test
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | yield ports from data_o and addr_o
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commit | commitdiff | tree |
| 2020-06-10 |
Luke Kenneth Casson... | expand LenExpand to 4 bits in order to cover 1/2/4...
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commit | commitdiff | tree |
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