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rewrite pcdec. pseudocode to work better for JPEG
[openpower-isa.git]
/
openpower
/
isatables
/
RM-1P-3S1D.csv
2022-09-30
Jacob Lifshay
rewrite pcdec. pseudocode to work better for JPEG
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2022-09-29
Jacob Lifshay
rename madded->maddedu for consistency with PowerISA...
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2022-09-29
Jacob Lifshay
rename divrem2du->divmod2du for consistency with PowerI...
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2022-09-29
Jacob Lifshay
add bigint ops
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2022-09-23
Jacob Lifshay
add pcdec -- doesn't yet work due to broken ISACaller...
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2022-09-21
Luke Kenneth Casso...
add sv.madd* to sv_analysis
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2022-09-17
Luke Kenneth Casso...
add SVmask_src enum, rename fields to EN and NO to...
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2022-09-17
Luke Kenneth Casso...
add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
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2022-08-13
Luke Kenneth Casso...
remove Pack/Unpack flag entirely from sv_analysis
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2022-08-03
Luke Kenneth Casso...
WHOOPS. set the pack column in CSV files unconditionall...
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2022-07-30
Luke Kenneth Casso...
addPack/Unpack to sv_analysis, extra CSV column.
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2022-06-24
Jacob Lifshay
add missed generated csv changes
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2022-05-02
Luke Kenneth Casso...
re-run sv_analysis to add mode field to csvs
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2021-11-17
Jacob Lifshay
rename ternary->ternlog and associated form/field TI...
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2021-11-12
Jacob Lifshay
change ternaryi to correct register fields
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2021-07-23
Luke Kenneth Casso...
add sv.fdmadds unit test
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2021-06-27
Luke Kenneth Casso...
add new (experimental) ffmadds and ffmsubs, for FFT...
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2021-06-25
Luke Kenneth Casso...
update sv_analysis.py to match new CONDITIONs field...
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2021-06-15
Luke Kenneth Casso...
fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub...
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2021-05-18
Luke Kenneth Casso...
add beginning support for SVP64 IEEE754 FP
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2021-04-23
Luke Kenneth Casso...
add isatables extracted from microwatt and v3.0B spec
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