rewrite pcdec. pseudocode to work better for JPEG
[openpower-isa.git] / openpower / isatables / RM-1P-3S1D.csv
2022-09-30 Jacob Lifshayrewrite pcdec. pseudocode to work better for JPEG
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint ops
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-21 Luke Kenneth Casso... add sv.madd* to sv_analysis
2022-09-17 Luke Kenneth Casso... add SVmask_src enum, rename fields to EN and NO to...
2022-09-17 Luke Kenneth Casso... add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
2022-08-13 Luke Kenneth Casso... remove Pack/Unpack flag entirely from sv_analysis
2022-08-03 Luke Kenneth Casso... WHOOPS. set the pack column in CSV files unconditionall...
2022-07-30 Luke Kenneth Casso... addPack/Unpack to sv_analysis, extra CSV column.
2022-06-24 Jacob Lifshayadd missed generated csv changes
2022-05-02 Luke Kenneth Casso... re-run sv_analysis to add mode field to csvs
2021-11-17 Jacob Lifshayrename ternary->ternlog and associated form/field TI...
2021-11-12 Jacob Lifshaychange ternaryi to correct register fields
2021-07-23 Luke Kenneth Casso... add sv.fdmadds unit test
2021-06-27 Luke Kenneth Casso... add new (experimental) ffmadds and ffmsubs, for FFT...
2021-06-25 Luke Kenneth Casso... update sv_analysis.py to match new CONDITIONs field...
2021-06-15 Luke Kenneth Casso... fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub...
2021-05-18 Luke Kenneth Casso... add beginning support for SVP64 IEEE754 FP
2021-04-23 Luke Kenneth Casso... add isatables extracted from microwatt and v3.0B spec