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switch to exact version of cython
[ieee754fpu.git]
/
src
/
ieee754
/
div_rem_sqrt_rsqrt
/ div_pipe.py
2019-07-28
Luke Kenneth Casso...
whitespace
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2019-07-23
Luke Kenneth Casso...
remove debug prints
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2019-07-22
Luke Kenneth Casso...
continuing experimentation
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2019-07-22
Luke Kenneth Casso...
config/setup/imports
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2019-07-22
Luke Kenneth Casso...
add missing ispec/ospecs
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2019-07-22
Luke Kenneth Casso...
whitespace
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2019-07-22
Luke Kenneth Casso...
more imports / syntax errors
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2019-07-22
Luke Kenneth Casso...
set up DivPipeCoreConfig back in FPDIVMuxInOut, syntax...
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2019-07-22
Luke Kenneth Casso...
fix imports
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2019-07-21
Luke Kenneth Casso...
match mantissa width up in div config
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2019-07-21
Luke Kenneth Casso...
create get_core_config function
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2019-07-21
Luke Kenneth Casso...
start also putting in additional DivPipe*Stage usage
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2019-07-21
Luke Kenneth Casso...
add preliminary DivPipeCalculateStage and DivPipeFinalStage
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2019-07-21
Luke Kenneth Casso...
add "z" to DivPipeBaseData class so that sign and expon...
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2019-07-14
Jacob Lifshay
finish implementing DivPipeConfig.__init__
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2019-07-14
Jacob Lifshay
switch pspec from dict to PipelineSpec
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2019-07-07
Jacob Lifshay
misc code cleanups
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2019-07-07
Jacob Lifshay
move DivPipe(?!Core).* classes to div_pipe.py
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