have to now add LD/ST-update instructions to list of explicit-allowed
[openpower-isa.git] / src / openpower / decoder / isa / caller.py
2023-06-02 Luke Kenneth Casso... have to now add LD/ST-update instructions to list of...
2023-06-02 Jacob Lifshayadd support for *_flag global variables needed by bfp_...
2023-06-02 Luke Kenneth Casso... add very very very basic write-out of instruction log
2023-06-02 Jacob Lifshaychange FPSCR to a required parameter of ISACallerHelper
2023-06-02 Jacob LifshayRevert "remove now-unnecessary SO global, since XER...
2023-06-02 Jacob Lifshayadd self.FPSCR
2023-06-02 Jacob Lifshayremove now-unnecessary SO global, since XER[SO] syntax...
2023-06-02 Jacob Lifshayadd support for accessing XER using XER.SO syntax ...
2023-06-02 Luke Kenneth Casso... fix data-dependent fail-first on load
2023-06-02 Luke Kenneth Casso... extend previous hard-coded magic constant (256) used...
2023-06-02 Luke Kenneth Casso... add FPSCR to ISACaller
2023-06-02 Konstantinos Marga... merge maddrs/msubrs, unit tests changed accordingly
2023-06-02 Konstantinos Marga... Add 2 more instructions to help with 2-coeff butterfly
2023-06-02 Konstantinos Marga... WIP: maddsubrs initial approach
2023-06-02 Jacob Lifshayadd fcvt/fmv -- no tests yet
2023-06-02 Luke Kenneth Casso... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-06-02 Luke Kenneth Casso... check RC1, add data-dependent fail-first LD/ST test
2023-06-02 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-06-02 Jacob Lifshayadd shaddw
2023-06-02 Luke Kenneth Casso... add power_decode_svp64_rm.py capability for new LD...
2023-06-02 Luke Kenneth Casso... comment about massive unnecessary code-duplication...
2023-06-02 Jacob Lifshayfix add-like CA/OV outputs
2023-06-02 Jacob Lifshayadd addex to simulator
2023-06-02 Jacob Lifshayfix typo when getting pseudo-code output variables
2023-06-02 Dmitry Selyutinpower_enums: clean code
2023-06-02 Dmitry Selyutinpower_insn: sort opcodes by sections
2023-06-02 Luke Kenneth Casso... enable misaligned Mem in ISACaller by default
2023-06-02 Luke Kenneth Casso... print out memory exception details, on unaligned
2023-06-02 Jacob Lifshayadd maddedus
2023-06-02 Luke Kenneth Casso... add dsld. (Rc=1) test, make overflow acceptable to...
2023-06-02 Dmitry Selyutinisa/caller.py: support shadd/shadduw instructions
2023-06-02 Luke Kenneth Casso... add maxs. combined with cmp capability
2023-06-02 Jacob Lifshayfix get_masked_reg and add test
2023-06-02 Jacob Lifshayformat code removing unused imports
2023-06-02 Luke Kenneth Casso... move chacha20 to separate test, set/get masked regs...
2023-06-02 Luke Kenneth Casso... TODO, sort out remap indices order
2023-06-02 Luke Kenneth Casso... debug print correction
2023-06-02 Luke Kenneth Casso... sigh, have to use yield from on get_out_map()
2023-06-02 Luke Kenneth Casso... rewrite get_idx_out2 in ISACaller to split out
2023-06-02 Luke Kenneth Casso... rewrite get_idx_out in ISACaller to split out
2023-06-02 Luke Kenneth Casso... code-shuffle, rework get_idx_in() to separate out the...
2023-06-02 Luke Kenneth Casso... SVP64RMModeDecode detects Post-Inc LDST-imm mode
2022-10-11 Luke Kenneth Casso... whoops zero-error on masked-out
2022-10-11 Luke Kenneth Casso... add ld/st-immediate "post-inc" mode support. unit test...
2022-10-10 Luke Kenneth Casso... add elwidth overrides to get_idx_out2
2022-10-08 Luke Kenneth Casso... fix format in debug log
2022-10-08 Luke Kenneth Casso... forgot to add offset on GPR() get
2022-10-08 Luke Kenneth Casso... add elwidth overrides on destination (write) in ISACaller.
2022-10-08 Luke Kenneth Casso... split out base,offset in register decoding for elwidth...
2022-10-07 Luke Kenneth Casso... more work on inssort. add useful reg-dump in ISACaller
2022-10-06 Luke Kenneth Casso... nope. failfirst needs to always save the result, but...
2022-10-06 Luke Kenneth Casso... sort out CROPs fail-first in ISACaller. needed to...
2022-10-06 Luke Kenneth Casso... make fail-first cope with sv.cmp which uses CR[BF]
2022-10-06 Luke Kenneth Casso... search for BF in registers to over-ride Vector lookup...
2022-10-06 Luke Kenneth Casso... starting to add sv.cmp support and failfirst, had to add
2022-10-02 Luke Kenneth Casso... comments for why preinc is called for svstep
2022-10-01 Luke Kenneth Casso... skip svstate_pre_inc on svremap
2022-10-01 Luke Kenneth Casso... no svstate instruction
2022-10-01 Luke Kenneth Casso... svstep calls SVSTATE_NEXT so needs svstate_pre_inc
2022-10-01 Luke Kenneth Casso... replacing setvl-svstep with just svstep
2022-10-01 Luke Kenneth Casso... comments
2022-10-01 Luke Kenneth Casso... comments
2022-10-01 Luke Kenneth Casso... minor cleanup in ISACaller on result handling
2022-10-01 Luke Kenneth Casso... simplify ISACaller execute_one
2022-10-01 Luke Kenneth Casso... simplify setting default SVSHAPE SPRs to zero
2022-09-30 Luke Kenneth Casso... set srcstep/dststep to zero in StepLoop (ISACaller...
2022-09-30 Luke Kenneth Casso... comments/variables-cleanup
2022-09-30 Luke Kenneth Casso... add sv.bc/vs - VLset - test. truncates VL at the vector...
2022-09-30 Luke Kenneth Casso... whitespace
2022-09-30 Luke Kenneth Casso... use regs variables in get_predint
2022-09-30 Luke Kenneth Casso... comments
2022-09-29 Luke Kenneth Casso... update iterators in ISACaller, not used yet
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint ops
2022-09-28 Luke Kenneth Casso... srcstep
2022-09-28 Luke Kenneth Casso... rename iterators init function
2022-09-28 Luke Kenneth Casso... redundant comment
2022-09-28 Luke Kenneth Casso... split out svstate update in ISACaller
2022-09-28 Luke Kenneth Casso... move failfirst check to separate function in ISACaller
2022-09-28 Luke Kenneth Casso... bugfix reset remaps and get subvl early
2022-09-27 Luke Kenneth Casso... hack to check skipping on predicate being all-zero.
2022-09-27 Luke Kenneth Casso... sort out predicate loop-skip on pack/unpack
2022-09-27 Luke Kenneth Casso... adapt loops to include predicate-mask skipping in ISACaller
2022-09-26 Luke Kenneth Casso... skipping on maskedout elements de-restricted when subst...
2022-09-26 Luke Kenneth Casso... finally got pack/unpack working
2022-09-26 Luke Kenneth Casso... code-morph on loop-end detection in ISACaller
2022-09-26 Luke Kenneth Casso... explicit test of src/dststep end-condition in ISACaller...
2022-09-24 Luke Kenneth Casso... add RC1 support to ISACaller.
2022-09-23 Luke Kenneth Casso... add data-dependent fail-first mode, Rc=1 variant not...
2022-09-23 Luke Kenneth Casso... remove need for explicit-hack for "pcdec." - rc column...
2022-09-23 Luke Kenneth Casso... lots of really bad hacks, here
2022-09-23 Luke Kenneth Casso... fix/hack some bugs in prefix_codes_cases
2022-09-23 Luke Kenneth Casso... add (sigh) to the hack-job get_pdecode_idx_out2() in...
2022-09-23 Luke Kenneth Casso... change variablename dec2.use_svp64_fft to implicit_rs
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayfix 'write reg ' log call
2022-09-23 Jacob Lifshayadd RC input to isa/caller.py
2022-09-23 Jacob Lifshayformat code
2022-09-22 Luke Kenneth Casso... add first (correctly-working) ctr-mode sv.bc test
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