2022-10-06 |
Luke Kenneth Casso... | starting to add sv.cmp support and failfirst, had to add |
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2022-09-29 |
Jacob Lifshay | rename madded->maddedu for consistency with PowerISA... |
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2022-09-29 |
Jacob Lifshay | rename divrem2du->divmod2du for consistency with PowerI... |
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2022-09-29 |
Jacob Lifshay | add bigint ops |
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2022-09-23 |
Luke Kenneth Casso... | add (sigh) to the hack-job get_pdecode_idx_out2() in... |
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2022-09-23 |
Jacob Lifshay | add pcdec -- doesn't yet work due to broken ISACaller... |
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2022-09-17 |
Luke Kenneth Casso... | add SVmask_src enum, rename fields to EN and NO to... |
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2022-09-13 |
Dmitry Selyutin | power_enums: convert SVExtra to RegType |
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2022-09-13 |
Jacob Lifshay | add fptrans support to isa caller |
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2022-09-12 |
Dmitry Selyutin | power_enums: consider CRIn2Sel |
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2022-09-12 |
Dmitry Selyutin | power_insn: introduce pseudo cr_in2 |
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2022-09-12 |
Dmitry Selyutin | power_enums: strict selectors conversion |
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2022-09-11 |
Luke Kenneth Casso... | add new CRIn2Sel for later, for getting rid of CRInSel... |
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2022-09-11 |
Luke Kenneth Casso... | BFT does not exist |
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2022-09-11 |
Luke Kenneth Casso... | add missing addpcis to power_enums.py and minor_19.csv |
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2022-09-11 |
Luke Kenneth Casso... | add CR5Operand and CR3Operand to power_insns.py |
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2022-09-06 |
Dmitry Selyutin | power_enum: tune SVPtype representation |
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2022-09-06 |
Dmitry Selyutin | power_enum: tune SVEtype representation |
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2022-09-06 |
Dmitry Selyutin | power_enum: tune SVExtra representation |
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2022-09-05 |
Luke Kenneth Casso... | remove parallel-reduction mode from decoder and sv... |
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2022-09-05 |
Luke Kenneth Casso... | rename "PARALLEL" enums to "PTREDUCE" - parallel tree... |
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2022-09-04 |
Luke Kenneth Casso... | add detection of Parallel-Reduction Mode into SVP64RMMo... |
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2022-09-03 |
Luke Kenneth Casso... | update sv_analysis to create separate SVMode.LDST_IDX... |
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2022-09-02 |
Luke Kenneth Casso... | add svshape2 to list of instructions in power_enums.py |
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2022-09-02 |
Luke Kenneth Casso... | add svshape2 (stub pseudocode) fields, Form, and CSV... |
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2022-09-02 |
Luke Kenneth Casso... | shuffle down numbering after SVM to make room for SVM2 |
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2022-09-01 |
Luke Kenneth Casso... | drat have to use RCOE.RC not RCOE.RC_OE for now otherwise |
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2022-09-01 |
Luke Kenneth Casso... | rename FLAGS to RCOE |
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2022-09-01 |
Luke Kenneth Casso... | rename RC to FLAGS |
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2022-09-01 |
Luke Kenneth Casso... | begin doing RC_OE / RC_ONLY |
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2022-08-17 |
Dmitry Selyutin | power_enums: fix conversion from selector to reg |
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2022-08-14 |
Dmitry Selyutin | power_enums: map in/out to extra |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce SVMode enum |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce SVExtraReg enum |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce SVExtraRegType enum |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce SVExtra alias |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce RegType enum |
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2022-08-14 |
Dmitry Selyutin | power_enums: allow SVPtype aliases |
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2022-08-14 |
Dmitry Selyutin | power_enums: better repr for Function enum |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce LDSTLen alias class |
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2022-08-14 |
Dmitry Selyutin | power_enums: introduce base enum class |
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2022-08-14 |
Luke Kenneth Casso... | go with separate bit for Pack/Unpack mode in SVP64RMMod... |
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2022-08-14 |
Luke Kenneth Casso... | add PACK/UNPACK Mode descriptions to power_svp64_rm.py |
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2022-08-09 |
Dmitry Selyutin | power_enums: add missing forms |
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2022-07-27 |
Konstantinos Marga... | Add fishmv instruction (bug #887) |
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2022-07-26 |
Konstantinos Marga... | Add fmvis instruction + tests, bug #887 |
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2022-07-06 |
Luke Kenneth Casso... | add svindex to power_enums.py, minor_22.csv |
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2022-06-24 |
Luke Kenneth Casso... | add bmask to instruction list |
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2022-06-23 |
Luke Kenneth Casso... | add BM2-Form to power_enums.py |
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2022-06-23 |
Andrey Miroshnikov | Added bmask, pywriter failing |
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2022-06-23 |
Luke Kenneth Casso... | add comment-stripping to get_csv() |
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2022-06-22 |
Andrey Miroshnikov | Added cprop to caller, enums, svp64 |
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2022-06-22 |
Andrey Miroshnikov | Added CPROP to powerenums |
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2022-06-20 |
Luke Kenneth Casso... | add absolute-signed-diff next to absolute-unsigned... |
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2022-06-20 |
Luke Kenneth Casso... | rename absadd[us] to absdac[ud] |
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2022-06-19 |
Luke Kenneth Casso... | add absadd (unsigned) DRAFT |
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2022-06-19 |
Luke Kenneth Casso... | add absolute-difference DRAFT |
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2022-06-19 |
Luke Kenneth Casso... | add average-add DRAFT pseudocode and CSV |
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2022-06-19 |
Luke Kenneth Casso... | add maxs DRAFT instruction |
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2022-06-17 |
Luke Kenneth Casso... | add KAIVB SPR 850 |
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2022-04-08 |
Jacob Lifshay | add SPDX-License-Identifier rather than License: |
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2022-01-19 |
Luke Kenneth Casso... | add spr-to-state conversion, and support for state1... |
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2022-01-18 |
Jacob Lifshay | grev[w][i][.] pseudo-code works |
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2022-01-06 |
Jacob Lifshay | add grev[w][i] instructions |
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2022-01-06 |
Luke Kenneth Casso... | add tlbsync and wait as NOPs |
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2022-01-05 |
Luke Kenneth Casso... | add eieio instruction as a NOP to minor 31 csv |
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2022-01-05 |
Luke Kenneth Casso... | add lbzcix instruction which had been completely forgot... |
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2021-12-13 |
Tobias Platen | add namedtuple MSRSpec |
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2021-12-09 |
Luke Kenneth Casso... | add FAST SPRs temporarily to power_enums |
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2021-12-07 |
Luke Kenneth Casso... | whoops wrong number |
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2021-12-07 |
Luke Kenneth Casso... | add OP_FETCH_FAILED micro-op |
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2021-11-17 |
Jacob Lifshay | rename ternary->ternlog and associated form/field TI... |
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2021-11-13 |
Jacob Lifshay | remove excess I from ternary-related names |
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2021-11-12 |
Jacob Lifshay | change ternaryi to correct register fields |
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2021-11-12 |
Jacob Lifshay | format code |
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2021-11-10 |
Luke Kenneth Casso... | add RT as an option for ternary instruction as 3rd... |
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2021-11-05 |
Jacob Lifshay | add ternaryi |
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2021-11-05 |
Jacob Lifshay | format code |
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2021-09-23 |
Luke Kenneth Casso... | add stfsux and unit test, code was there, needed adding... |
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2021-09-04 |
Luke Kenneth Casso... | redo SVP64 RM Decode to new CTR-Test Mode (svstep not... |
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2021-08-08 |
Luke Kenneth Casso... | add SVP64 Branch-Conditional decoding |
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2021-08-05 |
Luke Kenneth Casso... | start adding Branch-Conditional decoding to SVP64RMMode... |
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2021-08-01 |
Luke Kenneth Casso... | bit of a big update, remove all bit-reversed LD operati... |
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2021-07-27 |
Dmitry Selyutin | power_enums: cbcdtd instruction |
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2021-07-27 |
Dmitry Selyutin | power_enums: cdtbcd instruction |
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2021-07-27 |
Dmitry Selyutin | power_enums: addg6s instruction |
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2021-07-24 |
Luke Kenneth Casso... | added an extra SVP64 instruction, svstep, to replace... |
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2021-07-23 |
Luke Kenneth Casso... | add DCT mul-add to CSV and enums |
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2021-07-16 |
Luke Kenneth Casso... | add fsins and fcoss to simulator |
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2021-07-11 |
Luke Kenneth Casso... | add SVREMAP new Form / Fields and CSV entry |
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2021-07-11 |
Luke Kenneth Casso... | rename svremap to svshape |
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2021-07-10 |
Luke Kenneth Casso... | add ffadds decoding: |
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2021-07-08 |
Luke Kenneth Casso... | whoops asmcode length (number of instructions) went... |
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2021-07-05 |
Luke Kenneth Casso... | add svremap manual instruction (Primary Opcode 22,... |
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2021-07-01 |
Luke Kenneth Casso... | add temporary SV pseudocode |
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2021-07-01 |
Luke Kenneth Casso... | add TEMPORARY svremap form and instruction |
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2021-06-27 |
Luke Kenneth Casso... | add new (experimental) ffmadds and ffmsubs, for FFT... |
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2021-06-27 |
Luke Kenneth Casso... | change name to OP_FP_MADD to identify fmadd (etc) |
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2021-06-26 |
Luke Kenneth Casso... | comment out l*br pseudo-ops from power_enums.py |
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2021-06-25 |
Luke Kenneth Casso... | rename svp64 bit-reversed LD instructions to not confli... |
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