power_insn: major refactoring and cleanup
[openpower-isa.git] / src / openpower / sv / trans / svp64.py
2023-06-02 Dmitry Selyutinpower_insn: major refactoring and cleanup
2023-06-02 Dmitry Selyutinpysvp64asm: avoid empty fields
2023-06-02 Dmitry Selyutinpysvp64asm: allow insndb-based assembly
2023-06-02 Dmitry Selyutinpysvp64asm: deprecate custom_insn helper
2023-06-02 Dmitry Selyutinpower_insn: sort opcodes by sections
2023-06-02 Dmitry Selyutinpower_insn: provide basics for insndb assembly
2023-06-02 Jacob Lifshayadd maddedus
2023-06-02 Luke Kenneth Casso... restore Z23 shadd/shadduw
2023-06-02 Luke Kenneth Casso... redo the 3-in 1-out move of dsld/dsrd to EXT04 VA2...
2023-06-02 Dmitry Selyutinpysvp64asm: support shadd/shadduw instructions
2023-06-02 Dmitry Selyutinpysvp64asm: introduce more flexible Z23 wrapper
2023-06-02 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2023-06-02 Luke Kenneth Casso... bigint shuffle
2022-10-11 Luke Kenneth Casso... add /pi to sv/trans/svp64.py and power_insns.py
2022-10-06 Luke Kenneth Casso... add PredicateBaseRM decode to CR Ops Simple mode as...
2022-10-06 Luke Kenneth Casso... add vli mode to ff=5 CR ops
2022-10-06 Luke Kenneth Casso... add sv.cmp (ffirst-5) decode/encode asm support
2022-10-06 Luke Kenneth Casso... slightly different crops failfirst mode bits
2022-10-06 Luke Kenneth Casso... add sv.cmp and try fail-first test_pysvp64dist.py
2022-09-30 Jacob Lifshayfix pcdec. assembly -- merge into va_form() since it...
2022-09-30 Jacob Lifshayrewrite pcdec. pseudocode to work better for JPEG
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint ops
2022-09-29 Jacob Lifshayadd missing DRAFT comment
2022-09-25 Dmitry Selyutinpysvp64asm: fix VLi attribute access
2022-09-25 Luke Kenneth Casso... have to sanity-check dz/zz after full qualifier-process...
2022-09-25 Luke Kenneth Casso... add dz/sz assertion in is_bc mode
2022-09-25 Luke Kenneth Casso... whitespace
2022-09-24 Luke Kenneth Casso... move sea check to after all qualifiers are checked
2022-09-24 Luke Kenneth Casso... check variable rather than explicit == LDST_IDX
2022-09-24 Luke Kenneth Casso... add elstrided/sea on ldst_idx mode
2022-09-24 Dmitry Selyutinpysvp64asm: support /sea specifier
2022-09-24 Dmitry Selyutinpysvp64asm: fix comment layout
2022-09-24 Luke Kenneth Casso... set sv_mode to 0b01 in element-strided
2022-09-24 Luke Kenneth Casso... frickin frick
2022-09-24 Luke Kenneth Casso... add assert to stop failfirst+sea
2022-09-24 Luke Kenneth Casso... comment inv,CRbit swap in decode_bo
2022-09-24 Dmitry Selyutinpysvp64asm: expand vector register macros
2022-09-24 Dmitry Selyutinpower_fields: restore class-oriented traversal
2022-09-23 Luke Kenneth Casso... whoops consistent inversion of inv,CRbit was CRbit,inv
2022-09-23 Luke Kenneth Casso... extra failfirst dis tests
2022-09-23 Luke Kenneth Casso... remove barse-ackwardsness, use SelectableInt() in decode_bo
2022-09-23 Luke Kenneth Casso... put back the barse-ackward decode_bo inversion of ...
2022-09-23 Luke Kenneth Casso... lots of really bad hacks, here
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-20 Luke Kenneth Casso... minor codemorph, whitespace
2022-09-20 Luke Kenneth Casso... remove messy string identification, use RM Mode from...
2022-09-20 Dmitry Selyutinpysvp64asm: fix sz handling
2022-09-20 Dmitry Selyutinpysvp64asm: support vli specifier
2022-09-20 Dmitry Selyutinpysvp64asm: update sz upon snz specifier
2022-09-20 Dmitry Selyutinpower_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers
2022-09-20 Dmitry Selyutinpysvp64asm: support branch modes
2022-09-19 Dmitry Selyutinpower_insn: simplify branch table
2022-09-19 Luke Kenneth Casso... add bc_ctr and bc_cti but not used yet
2022-09-18 Dmitry Selyutinpysvp64asm: restore original BO
2022-09-18 Luke Kenneth Casso... reverse decode_bo inv/eq/lt/le/etc. thing
2022-09-18 Dmitry Selyutinpysvp64asm: make zz also set src_zero
2022-09-18 Luke Kenneth Casso... remove subvector mode from sv/trans/svp64.py
2022-09-18 Luke Kenneth Casso... change sv/trans/svp64.py source/dest elwidth assembler...
2022-09-17 Dmitry Selyutinpysvp64asm: SVP64 instruction debug logs
2022-09-17 Luke Kenneth Casso... whoops. mode-bits need to be put in MSB0 order. sigh
2022-09-17 Luke Kenneth Casso... add zz mode to sv/trans/svp64.py as a hack
2022-09-17 Luke Kenneth Casso... remove sv.setvl/pk/up/pu - these are all gone in favour...
2022-09-12 Luke Kenneth Casso... add hack overloaded meaning of destwid to be pack/unpack.
2022-09-12 Jacob Lifshayadd fptrans ops to src/openpower/sv/trans/svp64.py
2022-09-12 Luke Kenneth Casso... remove pack/unpack - now part of sv.setvl
2022-09-10 Jacob Lifshaymove ffadds to not conflict with fptrans -- makes space...
2022-09-08 Luke Kenneth Casso... whitespace
2022-09-08 Dmitry Selyutinpysvp64asm: fix missing arguments
2022-09-08 Dmitry Selyutinsvshape2: rename fields
2022-09-06 Dmitry Selyutinpysvp64asm: create database once
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Jacob Lifshayadd all fptrans ops to CSVs
2022-09-05 Luke Kenneth Casso... remove parallel-reduction mode from decoder and sv...
2022-09-05 Luke Kenneth Casso... rename "PARALLEL" enums to "PTREDUCE" - parallel tree...
2022-09-04 Luke Kenneth Casso... add parallel-reduction (subvl=0) in sv/trans/svp64.py
2022-09-04 Jacob Lifshayreallocate opcodes for ffadds (converted to X-FORM...
2022-09-03 Luke Kenneth Casso... Revert "add inv option to svshape2 (only 1 bit)"
2022-09-03 Luke Kenneth Casso... add inv option to svshape2 (only 1 bit)
2022-09-02 Luke Kenneth Casso... add test_caller_svshape2.py and make corrections to...
2022-09-02 Luke Kenneth Casso... add svshape2 to sv/trans/svp64.py
2022-09-02 Luke Kenneth Casso... disallow reserved SVrm values in svshape, svp64.py
2022-09-01 Jacob Lifshayremove support for unnamed arguments for @_custom_insns...
2022-09-01 Jacob Lifshayremove dead code, sv.svstep and sv.fcoss are now handle...
2022-09-01 Jacob Lifshaymake sv.instr use CUSTOM_INSNS by default for assemblin...
2022-09-01 Jacob Lifshayuse a decorator for constructing CUSTOM_INSNS
2022-09-01 Jacob Lifshayfix comment location
2022-09-01 Jacob Lifshayformat code
2022-08-30 Luke Kenneth Casso... Revert "format code"
2022-08-30 Luke Kenneth Casso... Revert "fix comment location"
2022-08-30 Luke Kenneth Casso... Revert "use a decorator for constructing CUSTOM_INSNS"
2022-08-30 Luke Kenneth Casso... Revert "make sv.instr use CUSTOM_INSNS by default for...
2022-08-30 Luke Kenneth Casso... Revert "remove dead code, sv.svstep and sv.fcoss are...
2022-08-30 Luke Kenneth Casso... Revert "remove fuck-up by programmerjake not reading...
2022-08-30 Luke Kenneth Casso... remove fuck-up by programmerjake not reading the specif...
2022-08-30 Jacob Lifshayremove dead code, sv.svstep and sv.fcoss are now handle...
2022-08-30 Jacob Lifshaymake sv.instr use CUSTOM_INSNS by default for assemblin...
2022-08-30 Jacob Lifshayuse a decorator for constructing CUSTOM_INSNS
2022-08-30 Jacob Lifshayfix comment location
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