2022-10-25 |
Dmitry Selyutin | test_pysvp64dis: test shadd/shadduw instructions |
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2022-10-22 |
Luke Kenneth Casso... | add extra pysvp64dis tests for divmod2du and maddedu |
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2022-10-22 |
Luke Kenneth Casso... | argh, extremely annoying: 4-operand dsld/dsrd is not... |
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2022-10-22 |
Luke Kenneth Casso... | bigint shuffle |
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2022-10-19 |
Dmitry Selyutin | sv_binutils_fptrans: fix registers generation |
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2022-10-14 |
Dmitry Selyutin | sv_binutils_fptrans: fix opcodes mode |
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2022-10-14 |
Dmitry Selyutin | sv_binutils_fptrans: generate all permutations |
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2022-10-14 |
Dmitry Selyutin | pysvp64asm: fix coding style |
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2022-10-14 |
Luke Kenneth Casso... | add sv.stwu/pi example in test_sv_load_store_postinc |
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2022-10-14 |
Luke Kenneth Casso... | add ld/st-immediate "post-inc" mode support. unit test... |
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2022-10-14 |
Luke Kenneth Casso... | add /pi to sv/trans/svp64.py and power_insns.py |
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2022-10-08 |
Luke Kenneth Casso... | add rfscv to major_19.csv, add test_pysvp64dis.py unit... |
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2022-10-08 |
Luke Kenneth Casso... | drat |
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2022-10-08 |
Luke Kenneth Casso... | add sc and scv support after moving from major.csv... |
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2022-10-08 |
Luke Kenneth Casso... | vector name "RSp" not recognised in sv.stq, added as... |
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2022-10-08 |
Luke Kenneth Casso... | add stq to CSV files and unit test to test_pysvp64dis.py |
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2022-10-08 |
Luke Kenneth Casso... | convert TargetAddrOperand to base class EXTSOperand |
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2022-10-08 |
Luke Kenneth Casso... | add lq and CONST_DQ |
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2022-10-08 |
Luke Kenneth Casso... | restore tests, accidentally disabled |
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2022-10-08 |
Luke Kenneth Casso... | add addex to csv and sv_analysis db. also needs CryIn... |
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2022-10-06 |
Luke Kenneth Casso... | add PredicateBaseRM decode to CR Ops Simple mode as... |
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2022-10-06 |
Luke Kenneth Casso... | add vli mode to ff=5 CR ops |
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2022-10-06 |
Luke Kenneth Casso... | add sv.cmp (ffirst-5) decode/encode asm support |
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2022-10-06 |
Luke Kenneth Casso... | slightly different crops failfirst mode bits |
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2022-10-06 |
Luke Kenneth Casso... | add sv.cmp and try fail-first test_pysvp64dist.py |
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2022-09-30 |
Jacob Lifshay | fix pcdec. assembly -- merge into va_form() since it... |
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2022-09-30 |
Jacob Lifshay | rewrite pcdec. pseudocode to work better for JPEG |
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2022-09-29 |
Jacob Lifshay | rename madded->maddedu for consistency with PowerISA... |
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2022-09-29 |
Jacob Lifshay | rename divrem2du->divmod2du for consistency with PowerI... |
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2022-09-29 |
Jacob Lifshay | add bigint ops |
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2022-09-29 |
Jacob Lifshay | add missing DRAFT comment |
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2022-09-25 |
Dmitry Selyutin | test_pysvp64dis: sort ld/st idx stride specs |
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2022-09-25 |
Dmitry Selyutin | pysvp64asm: fix VLi attribute access |
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2022-09-25 |
Luke Kenneth Casso... | have to sanity-check dz/zz after full qualifier-process... |
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2022-09-25 |
Luke Kenneth Casso... | add dz/sz assertion in is_bc mode |
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2022-09-25 |
Luke Kenneth Casso... | whitespace |
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2022-09-24 |
Luke Kenneth Casso... | move sea check to after all qualifiers are checked |
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2022-09-24 |
Luke Kenneth Casso... | check variable rather than explicit == LDST_IDX |
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2022-09-24 |
Luke Kenneth Casso... | add elstrided/sea on ldst_idx mode |
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2022-09-24 |
Dmitry Selyutin | test_pysvp64dis: test ld/st idx SEA (simple) |
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2022-09-24 |
Dmitry Selyutin | pysvp64asm: support /sea specifier |
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2022-09-24 |
Dmitry Selyutin | pysvp64asm: fix comment layout |
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2022-09-24 |
Luke Kenneth Casso... | set sv_mode to 0b01 in element-strided |
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2022-09-24 |
Luke Kenneth Casso... | frickin frick |
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2022-09-24 |
Luke Kenneth Casso... | add assert to stop failfirst+sea |
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2022-09-24 |
Luke Kenneth Casso... | add extra test_pysvp64dis.py test for ff=~RC1/vli mode |
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2022-09-24 |
Luke Kenneth Casso... | comment inv,CRbit swap in decode_bo |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: support RS opindex |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: provide Boolean class and Rc field |
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2022-09-24 |
Dmitry Selyutin | power_insn: replace Record.function with Record.mode |
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2022-09-24 |
Dmitry Selyutin | pysvp64asm: expand vector register macros |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: support opcodes offset representation |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: fix fields traversal |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: generate svp64_cr_in2 opindices |
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2022-09-24 |
Dmitry Selyutin | sv_binutils: generate BA opindex |
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2022-09-24 |
Dmitry Selyutin | power_fields: restore class-oriented traversal |
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2022-09-23 |
Luke Kenneth Casso... | whoops consistent inversion of inv,CRbit was CRbit,inv |
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2022-09-23 |
Luke Kenneth Casso... | extra failfirst dis tests |
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2022-09-23 |
Luke Kenneth Casso... | remove barse-ackwardsness, use SelectableInt() in decode_bo |
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2022-09-23 |
Luke Kenneth Casso... | put back the barse-ackward decode_bo inversion of ... |
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2022-09-23 |
Luke Kenneth Casso... | lots of really bad hacks, here |
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2022-09-23 |
Jacob Lifshay | add pcdec -- doesn't yet work due to broken ISACaller... |
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2022-09-23 |
Jacob Lifshay | format code |
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2022-09-21 |
Luke Kenneth Casso... | add sv.madd* to sv_analysis |
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2022-09-20 |
Luke Kenneth Casso... | minor codemorph, whitespace |
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2022-09-20 |
Luke Kenneth Casso... | sv.bc reclassified as RM-2P-1S by eliminating SPRs. |
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2022-09-20 |
Luke Kenneth Casso... | remove messy string identification, use RM Mode from... |
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2022-09-20 |
Luke Kenneth Casso... | add quick test and loooong test of pysvp64dis - branche... |
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2022-09-20 |
Dmitry Selyutin | pysvp64asm: fix sz handling |
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2022-09-20 |
Dmitry Selyutin | test_pysvp64dis: test vli specifier |
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2022-09-20 |
Dmitry Selyutin | pysvp64asm: support vli specifier |
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2022-09-20 |
Luke Kenneth Casso... | missed one sorting order in test_pysvp64dis.py |
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2022-09-20 |
Luke Kenneth Casso... | sort specifiers in pysvp64dis in lexicographical order |
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2022-09-20 |
Luke Kenneth Casso... | add two extra tests, sv.bc/m=r3/sz |
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2022-09-20 |
Dmitry Selyutin | pysvp64asm: update sz upon snz specifier |
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2022-09-20 |
Luke Kenneth Casso... | add sv.bc/ctr/vsb unit test to test_pysvp64dis.py to... |
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2022-09-20 |
Dmitry Selyutin | power_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers |
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2022-09-20 |
Dmitry Selyutin | pysvp64asm: support branch modes |
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2022-09-20 |
Dmitry Selyutin | power_insn: support common branch disassembly |
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2022-09-19 |
Dmitry Selyutin | power_insn: simplify branch table |
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2022-09-19 |
Luke Kenneth Casso... | add bc_ctr and bc_cti but not used yet |
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2022-09-19 |
Dmitry Selyutin | test_pysvp64dis: test els specifier |
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2022-09-18 |
Luke Kenneth Casso... | fix predicate mask case when smask was zero but mmode... |
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2022-09-18 |
Dmitry Selyutin | pysvp64asm: restore original BO |
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2022-09-18 |
Luke Kenneth Casso... | reverse decode_bo inv/eq/lt/le/etc. thing |
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2022-09-18 |
Luke Kenneth Casso... | dumb. accidentally removed test-call |
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2022-09-18 |
Luke Kenneth Casso... | add unit tests for Rc=1 ffirst/predicate-result |
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2022-09-18 |
Dmitry Selyutin | test_pysvp64dis: test RC1/~RC1 in ff/pr |
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2022-09-18 |
Dmitry Selyutin | pysvp64asm: make zz also set src_zero |
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2022-09-18 |
Luke Kenneth Casso... | adapt test_12_mr to /mrr and /mr modes, svm is gone... |
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2022-09-18 |
Dmitry Selyutin | test_pysvp64dis: test mrr/svm specifiers |
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2022-09-18 |
Luke Kenneth Casso... | remove subvector mode from sv/trans/svp64.py |
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2022-09-18 |
Luke Kenneth Casso... | change sv/trans/svp64.py source/dest elwidth assembler... |
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2022-09-18 |
Dmitry Selyutin | test_pysvp64dis: test sw specifier |
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2022-09-17 |
Luke Kenneth Casso... | add sat/satu test_12_sat to test_pysvp64dis.py |
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2022-09-17 |
Dmitry Selyutin | pysvp64asm: SVP64 instruction debug logs |
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2022-09-17 |
Luke Kenneth Casso... | whoops. mode-bits need to be put in MSB0 order. sigh |
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2022-09-17 |
Luke Kenneth Casso... | add zz mode to sv/trans/svp64.py as a hack |
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2022-09-17 |
Luke Kenneth Casso... | remove sv.setvl/pk/up/pu - these are all gone in favour... |
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2022-09-17 |
Luke Kenneth Casso... | add SVmask_src enum, rename fields to EN and NO to... |
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