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Fix some typos and whitespace
[soc.git]
/
src
/
soc
/
config
/
2020-10-04
Luke Kenneth Casso...
significant reorg of the litex pinspecs to use pinmux...
tree
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commitdiff
2020-10-04
Luke Kenneth Casso...
submodule update
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commitdiff
2020-09-06
Luke Kenneth Casso...
add DEC SPR to CoreState and PowerDecoder, activate...
tree
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commitdiff
2020-09-04
Luke Kenneth Casso...
adding option to include XICS external interrupts.
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commitdiff
2020-08-21
Luke Kenneth Casso...
ld/st bus reduction test operational
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commitdiff
2020-08-21
Luke Kenneth Casso...
first test of down-converted load/store from 64 to...
tree
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commitdiff
2020-08-03
Luke Kenneth Casso...
use new soc.config.state CoreState class in DMI and...
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commitdiff
2020-07-29
Jacob Lifshay
add __init__.py to all source directories
tree
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commitdiff
2020-07-29
Jacob Lifshay
clean up some tests
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commitdiff
2020-07-29
Jacob Lifshay
format some tests
tree
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commitdiff
2020-07-22
Jacob Lifshay
Merge remote-tracking branch 'origin/master'
tree
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commitdiff
2020-07-22
Jacob Lifshay
format code
tree
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commitdiff
2020-07-15
Luke Kenneth Casso...
add better comments on mul overflow
tree
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commitdiff
2020-07-15
Luke Kenneth Casso...
test privileged rfid call
tree
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commitdiff
2020-07-11
Luke Kenneth Casso...
add bigendian mode to helloworld test
tree
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commitdiff
2020-07-11
Luke Kenneth Casso...
sort out big/little endian startup on qemu
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commitdiff
2020-07-11
Luke Kenneth Casso...
sorting out bigendian/littleendian including in qemu
tree
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commitdiff
2020-07-08
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2020-07-07
Luke Kenneth Casso...
code-shuffle on testing to prepare loading large files...
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commitdiff
2020-07-02
Luke Kenneth Casso...
use Mock class (more convenient)
tree
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commitdiff
2020-07-02
Luke Kenneth Casso...
add bare wishbone option to TestIssuer, sort out ports
tree
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commitdiff
2020-07-01
Luke Kenneth Casso...
minor reorg on how Bus and Config classes are set up
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commitdiff
2020-06-29
Luke Kenneth Casso...
fetch instructions from bare wishbone fetch unit
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commitdiff
2020-06-28
Luke Kenneth Casso...
add Config Fetch interface and quick unit test
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commitdiff
2020-06-27
Luke Kenneth Casso...
unit test in l0_cache to connect to testpi and test_bare_wb
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commitdiff
2020-06-27
Luke Kenneth Casso...
fix TestMemLoadStoreUnit, it required a FSM to monitor...
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commitdiff
2020-06-27
Luke Kenneth Casso...
add wishbone Pi2LSUI test
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commitdiff
2020-06-27
Luke Kenneth Casso...
reconfigureable PortInterface testing now possible
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commitdiff
2020-06-26
Luke Kenneth Casso...
load/store unit test needed to wait for busy_o
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commitdiff
2020-06-26
Luke Kenneth Casso...
investigating why write-enable not getting passed through
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commitdiff
2020-06-26
Luke Kenneth Casso...
whoops forgot to call parent elaborate
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commitdiff
2020-06-26
Luke Kenneth Casso...
add test of SRAM through wishbone bus
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commitdiff
2020-06-26
Luke Kenneth Casso...
code-morph which redirects lsmem unit test through...
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commitdiff
2020-06-26
Luke Kenneth Casso...
add a test SRAM that lives behind a minerva LoadStoreUn...
tree
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commitdiff
2020-06-26
Luke Kenneth Casso...
add reconfigureable Load/Store class
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commitdiff