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pass state (MSR/PC) around between PowerDecode2, DMI, and TestIssuer
[soc.git]
/
src
/
soc
/
decoder
/
power_decoder.py
2020-07-22
Jacob Lifshay
Merge remote-tracking branch 'origin/master'
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2020-07-22
Jacob Lifshay
format code
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2020-07-12
Luke Kenneth Casso...
rename InternalOp to MicrOp
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2020-07-12
Luke Kenneth Casso...
modify PowerDecoder to read LDSTMode correctly
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2020-07-11
Luke Kenneth Casso...
sorting out bigendian/littleendian including in qemu
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2020-07-09
Luke Kenneth Casso...
identifying locations where big/little endian is in...
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2020-07-08
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-07-05
Luke Kenneth Casso...
stop debug output in power_decoder
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2020-06-17
Luke Kenneth Casso...
getting sim instruction decoder to reproduce asm instru...
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2020-06-17
Luke Kenneth Casso...
add comment/assembly decode in power enums
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2020-05-21
Luke Kenneth Casso...
add CR out decoder debug
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2020-05-21
Michael Nolan
Convert CR out to enum in power_decoder
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2020-05-21
Michael Nolan
Convert CR In field to enum instead of single bit
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2020-05-13
Michael Nolan
Fix too wide bitfield being selected for opcode 30
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2020-05-09
Luke Kenneth Casso...
document PowerOp
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2020-05-05
Yehowshua Immanuel
Merge branch 'master' of git.libre-riscv.org:soc
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2020-05-05
Yehowshua Immanuel
Git rid of named tuple imported twice
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2020-05-03
Luke Kenneth Casso...
add comments to power decoder
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2020-03-31
Luke Kenneth Casso...
split out sig set from sig setup
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2020-03-30
Michael Nolan
Minor cleanup
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2020-03-30
Luke Kenneth Casso...
add signals for all fields, accessible by named tuples...
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2020-03-30
Michael Nolan
WIP: Replace fields in power_decoder with signals of...
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2020-03-21
Luke Kenneth Casso...
mention instruction fetch mapping section
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2020-03-21
Luke Kenneth Casso...
add big/little byte-reversing
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2020-03-18
Luke Kenneth Casso...
add comments
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2020-03-09
Michael Nolan
Migrate imports to use absolute imports
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2020-03-09
Luke Kenneth Casso...
move all source directories to soc so that "import...
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