mem_types.py wb_types.py add name constructor to all RecordObjects
[soc.git] / src / soc / experiment / test /
2020-09-20 Luke Kenneth Casso... resolve issues in async sim: must not drive async clock...
2020-09-20 Luke Kenneth Casso... still experimenting with async FF sync
2020-09-20 Luke Kenneth Casso... continuing async clock experimenting
2020-09-20 Luke Kenneth Casso... add an async clock synchronizer experiment
2020-09-14 Luke Kenneth Casso... reorg mmu lookup test so it is called twice
2020-09-14 Luke Kenneth Casso... add mmu-dcache test
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures
2020-08-24 Tobias PlatenTestCachedMemoryPortInterface cleanup
2020-08-24 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-22 Luke Kenneth Casso... rename invert_a to invert_in because logical inverts RB
2020-08-21 Tobias Platentypo fix in test_l0_cache_buffer2.py
2020-08-21 Tobias Platenconnect TestCachedMemoryPortInterface to LDSTSplitter
2020-08-21 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-20 Tobias Platenstart wiring TestCachedMemoryPortInterface
2020-08-20 Tobias Platentestcase refactoring
2020-08-18 Tobias Platenadd testcase for LDSTSplitter using PortInterface
2020-08-11 Tobias Plateninitial version of L0CacheBuffer2
2020-07-29 Luke Kenneth Casso... bit of a big change: add prefixes "cu_" to all CompUnit...
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master'
2020-07-22 Jacob Lifshayformat code
2020-07-21 Luke Kenneth Casso... testing if MultiCompUnit can handle no input regs ...
2020-07-21 Luke Kenneth Casso... disable cxxsim for now
2020-07-19 Luke Kenneth Casso... convert compalu multi test to Simulator() (was run_simu...
2020-07-19 Luke Kenneth Casso... convert compalu multi test to Simulator() (was run_simu...
2020-07-19 Luke Kenneth Casso... add some CompUnit demo tests of the alu_fsm example
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-06-28 Cesar StraussStart with a simpler test case
2020-06-27 Luke Kenneth Casso... add wishbone Pi2LSUI test
2020-06-27 Luke Kenneth Casso... reconfigureable PortInterface testing now possible
2020-06-26 Luke Kenneth Casso... slight reorg on test_pi2ls.py
2020-06-26 Luke Kenneth Casso... add quick test showing Pi2LSUI not quite reading/writing to
2020-06-26 Luke Kenneth Casso... remove extraneous yields
2020-06-26 Michael NolanModify pi2ls so it passes the portinterface unit tests
2020-06-26 Luke Kenneth Casso... set address ok and fix unit test to check it properly
2020-06-26 Luke Kenneth Casso... add pi.busy_o connection, increase to 64 bit
2020-06-26 Luke Kenneth Casso... unit test broken is ok :)
2020-06-26 Michael NolanMove tests for pimem to new file, add ability to test...
2020-06-09 Cesar StraussAvoid a combinatorial loop on valid_o
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Cesar StraussCheck completion of the sub-processes
2020-06-03 Cesar StraussSimplify immediate check
2020-06-03 Cesar StraussPreliminary check of the alu protocol
2020-06-03 Cesar StraussPass along the operand, in the cycle in which go is...
2020-06-02 Cesar StraussAllow at least one operand to be fetched
2020-06-02 Cesar StraussHold rdmaskn active during the busy_o cycle
2020-06-01 Cesar StraussAdd rdmaskn parameter and assert it along issue_i
2020-05-31 Luke Kenneth Casso... add comments for MultiCompUnit parallel test
2020-05-31 Luke Kenneth Casso... remove unneeded imports
2020-05-31 Luke Kenneth Casso... split out compalu unit tests to separate module (gettin...