move over to from openpower imports
[soc.git] / src / soc / fu / alu / output_stage.py
2021-04-23 Luke Kenneth Casso... move over to from openpower imports
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures
2020-08-27 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-27 Luke Kenneth Casso... reorg of SO handling related to CR0
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-09 Luke Kenneth Casso... also set so only if OE requires it
2020-07-09 Luke Kenneth Casso... whoops test gets copied 4 times on the If.
2020-07-09 Luke Kenneth Casso... ALU output stage, change logic slightly
2020-07-09 Luke Kenneth Casso... clarifying comments on setting xer_ov/so
2020-06-08 Luke Kenneth Casso... set only the SO bit as sticky, not the OV flags as...
2020-06-06 Luke Kenneth Casso... code-munge
2020-05-28 Luke Kenneth Casso... remove trick of not setting SO
2020-05-27 Luke Kenneth Casso... LogicalOutputData does not need XER.so
2020-05-22 Luke Kenneth Casso... split out Logical Input and Output stages to common...
2020-05-20 Luke Kenneth Casso... normalise XER regs carry/32 and SO
2020-05-20 Luke Kenneth Casso... convert alu output to use Data for XER and CR0
2020-05-19 Michael NolanHandle carry out in alu
2020-05-19 Luke Kenneth Casso... 32-bit testing of output for CR0 conditions
2020-05-18 Luke Kenneth Casso... mass-rename of modules to soc.fu.*
2020-05-18 Luke Kenneth Casso... rename pipe to fu