add fast spr1/2 sim ALUHelpers
[soc.git] / src / soc / fu / branch / main_stage.py
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Luke Kenneth Casso... tidyup branch. comments
2020-06-02 Michael NolanSelect spr1 for bcctr - use fast_spr decoding from...
2020-06-02 Michael NolanFix test_bc_reg
2020-05-24 Michael NolanAssert that ctr is only written when needed
2020-05-24 Luke Kenneth Casso... comments on branch pipeline
2020-05-22 Michael NolanAdd formal proof for branch unit, fix bug with bcreg
2020-05-22 Michael NolanConvert branch unit to new CR interface
2020-05-22 Luke Kenneth Casso... comment tidyup
2020-05-22 Luke Kenneth Casso... code-shuffle
2020-05-20 Luke Kenneth Casso... use nmutil exts helper
2020-05-19 Luke Kenneth Casso... use field AA directly
2020-05-18 Luke Kenneth Casso... dumb syntax error
2020-05-18 Luke Kenneth Casso... mass-rename of modules to soc.fu.*
2020-05-18 Luke Kenneth Casso... rename pipe to fu