2020-05-31 |
Luke Kenneth Casso... | comment inputs and outputs from ALU unit test |
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2020-05-31 |
Luke Kenneth Casso... | imports - use of globals. baaaad |
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2020-05-31 |
Luke Kenneth Casso... | remove unneeded code and inputs. convert to "naming... |
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2020-05-31 |
Luke Kenneth Casso... | split out common code from test_alu_compunit.py |
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2020-05-31 |
Luke Kenneth Casso... | de-hard-code-ify getting results from MultiCompUnit |
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2020-05-31 |
Luke Kenneth Casso... | clarify |
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2020-05-31 |
Luke Kenneth Casso... | OP_CMPEQB also requesting change of output reg (stop... |
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2020-05-31 |
Luke Kenneth Casso... | OP_CMP is requesting a change of the output register... |
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2020-05-31 |
Luke Kenneth Casso... | still investigating |
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2020-05-31 |
Luke Kenneth Casso... | start with zero, try not to compare against 9 bytes... |
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2020-05-31 |
Luke Kenneth Casso... | more debug statements |
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2020-05-31 |
Luke Kenneth Casso... | add in more CR debug statements |
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2020-05-31 |
Luke Kenneth Casso... | copy in cr0.data into cr0 temp, not whole of cr0 (inclu... |
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2020-05-31 |
Luke Kenneth Casso... | remove commented-out vars from ALU input record |
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2020-05-31 |
Luke Kenneth Casso... | write cr0 when op.write_cr.ok is set |
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2020-05-31 |
Luke Kenneth Casso... | add write_cr to ALU record subset |
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2020-05-31 |
Luke Kenneth Casso... | comment out xer ov/so for now |
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2020-05-30 |
Luke Kenneth Casso... | get carry from cr write_cr |
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2020-05-30 |
Luke Kenneth Casso... | select CR0 write out only when RC=1 |
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2020-05-30 |
Luke Kenneth Casso... | set CR0 output when OP_CMP or OP_CMPEQB need it |
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2020-05-30 |
Luke Kenneth Casso... | add in write-mask into MultiCompUnit and MCU-ALU unit... |
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2020-05-30 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-30 |
Luke Kenneth Casso... | create read-mask for ALU CompUnit: switches off optiona... |
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2020-05-30 |
Luke Kenneth Casso... | mess - but a functional mess. ALU-MultiCompUnit semi... |
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2020-05-30 |
Luke Kenneth Casso... | grab other results from ALU pipeline in compunit test |
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2020-05-30 |
Luke Kenneth Casso... | order of XER so/ca wrong way round from regspec |
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2020-05-29 |
Luke Kenneth Casso... | module comments for popcount |
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2020-05-29 |
Luke Kenneth Casso... | comments on popcount |
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2020-05-29 |
Luke Kenneth Casso... | trigger read ALU ready/valid from latch as well |
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2020-05-28 |
Luke Kenneth Casso... | move simple_popcount out of class (does not use any... |
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2020-05-28 |
Luke Kenneth Casso... | extra check on rd.req in test_alu_compunit |
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2020-05-28 |
Michael Nolan | Add proof for OP_SETB |
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2020-05-28 |
Michael Nolan | Add OP_SETB |
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2020-05-28 |
Michael Nolan | Fix test_isel to properly examine registers |
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2020-05-28 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-28 |
Luke Kenneth Casso... | debug-print rd/wr rel in test_alu_compunit |
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2020-05-28 |
Luke Kenneth Casso... | debugging test_alu_compunit.py |
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2020-05-28 |
Luke Kenneth Casso... | start on a compunit ALU test |
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2020-05-28 |
Luke Kenneth Casso... | update comment |
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2020-05-28 |
Luke Kenneth Casso... | remove trick of not setting SO |
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2020-05-27 |
Luke Kenneth Casso... | code-morph, add TODO on OP_RFID, OP_SC, OP_ADDPCIS |
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2020-05-27 |
Luke Kenneth Casso... | add LD/ST pipe_data |
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2020-05-27 |
Luke Kenneth Casso... | LogicalOutputData does not need XER.so |
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2020-05-27 |
Luke Kenneth Casso... | comments |
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2020-05-27 |
Luke Kenneth Casso... | remove XER.ca from logical Input Data - not needed |
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2020-05-27 |
Luke Kenneth Casso... | cleanup logical main proof |
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2020-05-27 |
Luke Kenneth Casso... | check cr0, ov and ca ok signals in ALU main_stage proof |
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2020-05-27 |
Luke Kenneth Casso... | add carry-out, overflow and cr0 ok setting in ALU main_... |
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2020-05-27 |
Luke Kenneth Casso... | add SRR0 to TrapInputData |
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2020-05-27 |
Luke Kenneth Casso... | add links to bugreports into ALu formal proof as well |
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2020-05-27 |
Luke Kenneth Casso... | add links to bugreports into alu output stage proof |
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2020-05-27 |
Luke Kenneth Casso... | check reg output Data.ok in shift_rot formal proof |
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2020-05-27 |
Luke Kenneth Casso... | rename CROutputData.cr_o to just CROutputData.cr |
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2020-05-27 |
Luke Kenneth Casso... | test Data.ok for cr output and full cr output |
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2020-05-27 |
Luke Kenneth Casso... | assign and test on Data, TODO add Data.ok checking... |
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2020-05-27 |
Michael Nolan | Fix bug in alu main stage proof |
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2020-05-26 |
Michael Nolan | Add extras from bottom of the file |
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2020-05-26 |
Michael Nolan | Rewrite proof to be more in line with what appears... |
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2020-05-26 |
Luke Kenneth Casso... | whitespace, add commentary |
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2020-05-25 |
Michael Nolan | Correct polarity of shadow signal |
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2020-05-25 |
Luke Kenneth Casso... | document shadown inversion |
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2020-05-25 |
Michael Nolan | Add link to compunit wiki page |
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2020-05-25 |
Michael Nolan | Correct property numbers, add assertions about busy |
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2020-05-25 |
Michael Nolan | Add assertions about go_wr and wr_rel |
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2020-05-25 |
Michael Nolan | Minor cleanup of comments |
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2020-05-25 |
Michael Nolan | Begin working on proof for compunit/fu |
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2020-05-25 |
Luke Kenneth Casso... | add zero immed on LDST, untested |
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2020-05-24 |
Luke Kenneth Casso... | add comments for SPR pipe_data |
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2020-05-24 |
Luke Kenneth Casso... | add SPR pipe_data.py |
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2020-05-24 |
Luke Kenneth Casso... | over 80 char limit |
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2020-05-24 |
Luke Kenneth Casso... | add test of reg output, for MFCRF and ISEL |
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2020-05-24 |
Luke Kenneth Casso... | add gitignore for branch fu formal |
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2020-05-24 |
Luke Kenneth Casso... | add OP_CMPB formal proof |
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2020-05-24 |
Michael Nolan | Assert that ctr is only written when needed |
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2020-05-24 |
Luke Kenneth Casso... | split out Popcount into separate module: visually it... |
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2020-05-24 |
Luke Kenneth Casso... | copy code for MTMSR from microwatt into comments |
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2020-05-24 |
Luke Kenneth Casso... | add links for trap main stage |
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2020-05-24 |
Luke Kenneth Casso... | add untested OP_MTMSR and OP_MFMSR |
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2020-05-24 |
Luke Kenneth Casso... | comment and add links to branch formal proof |
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2020-05-24 |
Luke Kenneth Casso... | add copy of bpermd proof to logical formal proof (not... |
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2020-05-24 |
Luke Kenneth Casso... | track down overwrite of variable b |
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2020-05-24 |
Michael Nolan | Fix proof of bpermd module |
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2020-05-24 |
Michael Nolan | Fix bpermd and make tests pass |
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2020-05-24 |
Michael Nolan | Fix test_pipe_caller to conform to new Data() interface... |
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2020-05-24 |
Luke Kenneth Casso... | comments on branch pipeline |
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2020-05-24 |
Luke Kenneth Casso... | convert CR pipeline to Data.ok |
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2020-05-24 |
Luke Kenneth Casso... | convert ALU to output Data on int reg |
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2020-05-24 |
Luke Kenneth Casso... | convert logical to output Data on int reg |
tree | commitdiff |
2020-05-24 |
Luke Kenneth Casso... | start using Data in pipelines |
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2020-05-24 |
Luke Kenneth Casso... | cleanup/code-munge on ALU main stage proof |
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2020-05-24 |
Luke Kenneth Casso... | error in alu output stage formal proof setup |
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2020-05-24 |
Luke Kenneth Casso... | output registers need to be Data type (consistently) |
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2020-05-24 |
Luke Kenneth Casso... | spelling mistake in variable |
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2020-05-24 |
Luke Kenneth Casso... | TODO mention OP_MTMSR/OP_MFMSR |
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2020-05-24 |
Luke Kenneth Casso... | add RA to trap pipeline, for OP_MTMSR/OP_MFMSR |
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2020-05-23 |
colepoirier | Added branch and shift_rot imports to fu/compunits... |
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2020-05-23 |
Luke Kenneth Casso... | add input / output stage missing modules |
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2020-05-23 |
Luke Kenneth Casso... | update docs on compunits |
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2020-05-23 |
Luke Kenneth Casso... | remove extraneous test_isel |
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2020-05-23 |
Luke Kenneth Casso... | document purpose of regspec module |
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