projects
/
soc.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
nope - need it to be zero if not identified as svp64
[soc.git]
/
src
/
soc
/
minerva
/
2020-11-22
Luke Kenneth Casso...
simplify litex-core wishbone interfaces
tree
|
commitdiff
2020-10-22
Luke Kenneth Casso...
add detection and disable of Instruction Wishbone based...
tree
|
commitdiff
2020-10-22
Luke Kenneth Casso...
add detection and disable of LoadStore Wishbone based...
tree
|
commitdiff
2020-08-21
Luke Kenneth Casso...
get litex sim enabled with 32-bit wishbone bus
tree
|
commitdiff
2020-08-21
Luke Kenneth Casso...
ld/st bus reduction test operational
tree
|
commitdiff
2020-08-21
Luke Kenneth Casso...
first test of down-converted load/store from 64 to...
tree
|
commitdiff
2020-08-21
Luke Kenneth Casso...
add in WishboneDownConvert into LoadStoreUnitInterface
tree
|
commitdiff
2020-08-05
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
|
commitdiff
2020-08-05
Luke Kenneth Casso...
clear sel on loadstore
tree
|
commitdiff
2020-07-30
Luke Kenneth Casso...
set sel line in minerva instruction fetch
tree
|
commitdiff
2020-07-23
Luke Kenneth Casso...
allow imem to be 64/32 bit wide
tree
|
commitdiff
2020-07-22
Jacob Lifshay
Merge remote-tracking branch 'origin/master'
tree
|
commitdiff
2020-07-22
Jacob Lifshay
format code
tree
|
commitdiff
2020-07-17
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
|
commitdiff
2020-07-17
Luke Kenneth Casso...
likewise cut across latest Minerva loadstore with line...
tree
|
commitdiff
2020-07-17
Luke Kenneth Casso...
sigh easier to just do a line-for-line comparison of...
tree
|
commitdiff
2020-07-17
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
|
commitdiff
2020-07-17
Luke Kenneth Casso...
port minerva cache fixes
tree
|
commitdiff
2020-07-17
Luke Kenneth Casso...
forward-port minerva loadstore bugfix
tree
|
commitdiff
2020-07-02
Luke Kenneth Casso...
add bare wishbone option to TestIssuer, sort out ports
tree
|
commitdiff
2020-07-01
Luke Kenneth Casso...
minor reorg on how Bus and Config classes are set up
tree
|
commitdiff
2020-06-29
Luke Kenneth Casso...
fetch instructions from bare wishbone fetch unit
tree
|
commitdiff
2020-06-28
Luke Kenneth Casso...
add cached fetch unit pass-through args
tree
|
commitdiff
2020-06-28
Luke Kenneth Casso...
need args to WishboneArbiter, match data width size
tree
|
commitdiff
2020-06-28
Luke Kenneth Casso...
read from instruction memory using FetchUnitInterface
tree
|
commitdiff
2020-06-28
Luke Kenneth Casso...
parameterise minerva i-cache
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
whitespace and imports
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
whitespace
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
clean up output from BareLoadStoreUnit
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
code-morph which redirects lsmem unit test through...
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
dynamically specify wishbone layout (no longer hardcode...
tree
|
commitdiff
2020-06-26
Luke Kenneth Casso...
extra parameterification of minerva LoadStoreUnits
tree
|
commitdiff
2020-06-25
Luke Kenneth Casso...
rename LoadStoreInterface signals to include _i and...
tree
|
commitdiff
2020-06-25
Luke Kenneth Casso...
whitespace
tree
|
commitdiff
2020-06-24
Michael Nolan
Update comments for LoadStoreUnitInterface
tree
|
commitdiff
2020-06-24
Michael Nolan
Update comments on LoadStoreUnitInterface again
tree
|
commitdiff
2020-06-24
Michael Nolan
Update comments on LoadStoreUnitInterface
tree
|
commitdiff
2020-06-24
Michael Nolan
Super basic first try of testmem with load store unit...
tree
|
commitdiff
2020-06-24
Luke Kenneth Casso...
move comments to minerva LoadStoreInterface
tree
|
commitdiff
2020-06-19
Luke Kenneth Casso...
parameterise LoadStoreUnitInterface to be expandable
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
start trying to fill in some comments in Minerva L1...
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
whitespace cleanup
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
imports and syntax errors fixed (found test_cache.py)
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
more whitespace
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
more whitespace on minerva (no unit tests, so cannot...
tree
|
commitdiff
2020-06-15
Luke Kenneth Casso...
whitespace cleanup, remove minerva DataSelector class
tree
|
commitdiff
2020-06-04
Luke Kenneth Casso...
use copy of FHDLTestCase
tree
|
commitdiff
2020-05-06
Luke Kenneth Casso...
remove unneeded minerva code
tree
|
commitdiff
2020-04-06
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
|
commitdiff
2020-04-06
Jacob Lifshay
Merge branch 'fix-tests'
tree
|
commitdiff
2020-04-06
Jacob Lifshay
almost all tests work
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
fix more imports
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
fix more imports
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
enable rvfi, fix imports
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
destarify debug
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcardify units
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcardify unitsg
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
sort out imports to get minerva generate working
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcard core.py
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcard cache.py
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcard stage.py
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
dewildcard wishbone.py
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
replace isa import
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
de-starify csr.py
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
import minerva from soc.minerva
tree
|
commitdiff
2020-03-11
Luke Kenneth Casso...
add minerva source from https://github.com/lambdaconcep...
tree
|
commitdiff