2020-06-26 |
Luke Kenneth Casso... | add reconfigureable Load/Store class |
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2020-06-26 |
Luke Kenneth Casso... | extra parameterification of minerva LoadStoreUnits |
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2020-06-25 |
Luke Kenneth Casso... | allow Pi2LSUI to accept incoming PortInterface and... |
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2020-06-25 |
Luke Kenneth Casso... | add extra parameter, mask_wid, to TestMemLoadStoreUnit |
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2020-06-25 |
Luke Kenneth Casso... | start connecting up Pi2LSUI |
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2020-06-25 |
Luke Kenneth Casso... | add LenExpand module, tidyup on docstring |
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2020-06-25 |
Luke Kenneth Casso... | add beginnings of Pi2LSUI |
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2020-06-25 |
Luke Kenneth Casso... | add attempt at mapping between PortInterface and LoadSt... |
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2020-06-25 |
Luke Kenneth Casso... | rename LoadStoreInterface signals to include _i and... |
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2020-06-25 |
Luke Kenneth Casso... | whitespace |
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2020-06-24 |
Michael Nolan | Revert "modify PortInterface so subfields include the... |
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2020-06-24 |
Michael Nolan | Update comments for LoadStoreUnitInterface |
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2020-06-24 |
Michael Nolan | Have lsmem handle stall and valid signals correctly |
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2020-06-24 |
Michael Nolan | Update comments on LoadStoreUnitInterface again |
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2020-06-24 |
Michael Nolan | Update comments on LoadStoreUnitInterface |
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2020-06-24 |
Michael Nolan | Add handling of byte reads and writes |
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2020-06-24 |
Michael Nolan | Add more complete testbench for lsmem.py |
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2020-06-24 |
Michael Nolan | Super basic first try of testmem with load store unit... |
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2020-06-24 |
Luke Kenneth Casso... | move comments to minerva LoadStoreInterface |
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2020-06-24 |
Luke Kenneth Casso... | import minerva and use LoadStoreUnitInterface |
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2020-06-24 |
Michael Nolan | Add specification for load store interface |
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2020-06-23 |
Michael Nolan | modify PortInterface so subfields include the port... |
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2020-06-23 |
Luke Kenneth Casso... | annoying error in latest nmigen |
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2020-06-23 |
Luke Kenneth Casso... | TstL0CacheBuffer returns array of ports differently now |
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2020-06-22 |
Luke Kenneth Casso... | remove unused module |
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2020-06-22 |
Luke Kenneth Casso... | simplified L0CacheBuffer down to a "PortInterface Arbiter" |
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2020-06-22 |
Luke Kenneth Casso... | add TestMemoryPortInterface class which is designed... |
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2020-06-22 |
Luke Kenneth Casso... | comments for LDST CompUnit test |
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2020-06-22 |
Luke Kenneth Casso... | enable byte-reverse in CompLDSTUnit test |
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2020-06-22 |
Luke Kenneth Casso... | remove CompLDSTOpSubset, replace with just data_len. |
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2020-06-22 |
Luke Kenneth Casso... | move BE/LE byte-reverse into LDSTCompUnit |
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2020-06-20 |
Luke Kenneth Casso... | expand Memory width to 64 and granularity to 16 in... |
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2020-06-20 |
Luke Kenneth Casso... | add asserts to check data output is correct |
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2020-06-20 |
Luke Kenneth Casso... | add test_sram_wishbone.py |
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2020-06-20 |
colepoirier | Add code, commented-out, for TRAP so as to not break... |
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2020-06-19 |
Luke Kenneth Casso... | whitespace update |
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2020-06-19 |
Luke Kenneth Casso... | move trunc_div and trunc_rem to nmutil |
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2020-06-19 |
Luke Kenneth Casso... | add comments on trunc_div and trunc_rem |
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2020-06-19 |
Luke Kenneth Casso... | add divide-by-zero test to test_div_sim.py |
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2020-06-19 |
Luke Kenneth Casso... | add docstring comment for SelectableInt |
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2020-06-19 |
Luke Kenneth Casso... | add test_0_moduw and correct name to trunc_rem |
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2020-06-19 |
Luke Kenneth Casso... | add abs SelectableInt unit test (very quick) |
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2020-06-19 |
Luke Kenneth Casso... | add SelectableInt.abs |
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2020-06-19 |
Luke Kenneth Casso... | add another bad hack in parser.py which identifies... |
tree | commitdiff |
2020-06-19 |
Luke Kenneth Casso... | add in really bad hack which calls trunc_div or trunc_mod |
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2020-06-19 |
Luke Kenneth Casso... | add trunc_div and trunch_rem to decoder helpers |
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2020-06-19 |
Luke Kenneth Casso... | auto-assign needs to use concat / selectconcat |
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2020-06-19 |
Luke Kenneth Casso... | whoops detected page name wrong, for special case fixed... |
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2020-06-19 |
Luke Kenneth Casso... | bit of a mess. getting carry recognised and output... |
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2020-06-19 |
Luke Kenneth Casso... | add auto-assign mode detecting uninitialised variable... |
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2020-06-19 |
Luke Kenneth Casso... | div needs to be floordiv |
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2020-06-19 |
Luke Kenneth Casso... | add true and floor div to SelectableInt |
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2020-06-19 |
Luke Kenneth Casso... | add simulator test for divw |
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2020-06-19 |
Luke Kenneth Casso... | do mix-in for test_sim.py so that jacob can write some... |
tree | commitdiff |
2020-06-19 |
Luke Kenneth Casso... | add TODO comments to upgrade L0CacheBuffer to a new... |
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2020-06-19 |
Luke Kenneth Casso... | parameterise LoadStoreUnitInterface to be expandable |
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2020-06-18 |
Jacob Lifshay | div pipe completed except for tests |
tree | commitdiff |
2020-06-18 |
Jacob Lifshay | finish code to calculate the 64-bit output of the div... |
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2020-06-18 |
Jacob Lifshay | actually remove todo comment for manually checking... |
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2020-06-18 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-06-18 |
Jacob Lifshay | fix bug and manually check div overflow code against... |
tree | commitdiff |
2020-06-18 |
Luke Kenneth Casso... | enable general test cases in test_issuer |
tree | commitdiff |
2020-06-18 |
Luke Kenneth Casso... | got loop example operational by noting when PC fastreg... |
tree | commitdiff |
2020-06-18 |
Luke Kenneth Casso... | use different way to pass instructions to test_issuer... |
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2020-06-18 |
Luke Kenneth Casso... | debugging test_issuer.py general test cases |
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2020-06-18 |
Luke Kenneth Casso... | get instructions immediately from assembly code |
tree | commitdiff |
2020-06-18 |
Luke Kenneth Casso... | move test_sim.py unit tests to different class (split) |
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2020-06-18 |
Luke Kenneth Casso... | slightly hacky way to keep an eye on the PC |
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2020-06-18 |
Luke Kenneth Casso... | whoops generate core ilang not TestIssuer |
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2020-06-18 |
Luke Kenneth Casso... | use while / exception in test_compunit loop |
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2020-06-18 |
Luke Kenneth Casso... | investigating mtocrf/mtcrf issue |
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2020-06-18 |
Jacob Lifshay | working on adding rest of stage classes for div pipeline |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | add bug reference to mtocrf/mtcrf name decoding |
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2020-06-17 |
Luke Kenneth Casso... | decoding assembly instruction name, move to separate... |
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2020-06-17 |
Luke Kenneth Casso... | getting sim instruction decoder to reproduce asm instru... |
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2020-06-17 |
Luke Kenneth Casso... | add comment/assembly decode in power enums |
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2020-06-17 |
Luke Kenneth Casso... | update test_sim.py to do a simple execution loop: decod... |
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2020-06-17 |
Luke Kenneth Casso... | add loop example, required a bit of munging. |
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2020-06-17 |
Luke Kenneth Casso... | get fu compunit test to use ISACaller instruction-memory |
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2020-06-17 |
Luke Kenneth Casso... | got fed up of adding arguments to ISACaller / ISA,... |
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2020-06-17 |
Luke Kenneth Casso... | split execute and setup of ISACaller instruction execution |
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2020-06-17 |
Luke Kenneth Casso... | comment ISACaller setup |
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2020-06-17 |
Luke Kenneth Casso... | start to add in independent execution into ISACaller |
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2020-06-17 |
Luke Kenneth Casso... | add a fake program counter to ISACaller |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | use an independent power decoder in ISACaller |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | add "respect_pc" boolean to ISACaller |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | add optional instruction memory |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | split out TestIssuer into separate module |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | remove unneeded yield |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | enable all tests again in test_core.py and test_issuer.py |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | got test_issuer FSM operating. bit of a hack |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | debugging test_issuer, getting FSM working |
tree | commitdiff |
2020-06-17 |
Luke Kenneth Casso... | output to issuer_simulator.vcd |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | add first version unit test for TestIssuer |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | reduce instruction depth to 6 bits in TestIssuer |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | move debug statements to check function |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | hack LD/ST ad/st together, allow PC to be set externally |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | move check regs in simple core to separate function |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | move test core reg set up into separate function |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | set up a TestIssuer class with a FSM for doing instruct... |
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