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ha, hilarious: swapped TLBUpdate output sizes db_out and pb_out.
[soc.git]
/
src
/
2021-05-02
Luke Kenneth Casso...
mmu FSM store in dcache: only put data onto d_in on...
tree
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commitdiff
2021-05-02
Luke Kenneth Casso...
return d_out.valid instead of always "ok" in MMU FSM
tree
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commitdiff
2021-05-02
Luke Kenneth Casso...
HACK WARNING: disable d-cache on hard-coded address...
tree
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commitdiff
2021-05-02
Luke Kenneth Casso...
add nc argument to dcache load/store tests
tree
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commitdiff
2021-05-02
Luke Kenneth Casso...
quick hack to SRAM test and to dcache to enable classic...
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
enable issuer_verilog.py to generate new MMU/DCache...
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
send a DMI RESET at the end of the test.
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
store data in microwatt dcache goes in one cycle AFTER...
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
dcache store test: data goes in one cycle AFTER valid...
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
only do dcache lookup for now
tree
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commitdiff
2021-05-01
Cesar Strauss
Add GTKWave documents to each DCache unit test
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
add LD/ST cases to MMU, which should all still work
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
add MMUTestCaseROM
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
use new AllFunctionUnits.get_fu function
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
use SPRreduced to match PowerDecoder2
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
missing self.
tree
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commitdiff
2021-05-01
Luke Kenneth Casso...
resolve DriverConflict in TstL0CacheBuffer, really...
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
debug and stop on mmu test_pipe_caller.py
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
comments on dcache-to-mmu link
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
add a TestSRAM variant of LoadStore1, for being able...
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
add basic test_issuer_mmu.py
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
add option to use new mmu_cache_wb ConfigMemoryPortInte...
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
hook up dcache wb_in/out to PortInterfaceBase Wishbone...
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
sort out spblock 4k sram cell instance name to match...
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
https://bugs.libre-soc.org/show_bug.cgi?id=635
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
better reporting on gpr comparisons
tree
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commitdiff
2021-04-30
Luke Kenneth Casso...
set up LoadStore1 in ConfigMemoryPortInterface and...
tree
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commitdiff
2021-04-29
Luke Kenneth Casso...
comment out adding mmu and dcache to pspec in MMU FSM
tree
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commitdiff
2021-04-29
Luke Kenneth Casso...
move dcache into Loadstore1
tree
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commitdiff
2021-04-27
Luke Kenneth Casso...
add option to disable bus forwarding on SPRs and FAST...
tree
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commitdiff
2021-04-27
Luke Kenneth Casso...
add option to enable/disable bus forwarding mode on...
tree
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commitdiff
2021-04-27
Luke Kenneth Casso...
return read data out from Loadstore1 only when valid
tree
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commitdiff
2021-04-26
Luke Kenneth Casso...
hook up MSR into MMU (TODO, use a lot less bits)
tree
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commitdiff
2021-04-26
Luke Kenneth Casso...
simple regression dcache test was faulty. wishbone...
tree
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commitdiff
2021-04-26
Luke Kenneth Casso...
comment read ack in sram
tree
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commitdiff
2021-04-26
Luke Kenneth Casso...
incorrect indentation in dcache rams
tree
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commitdiff
2021-04-26
Luke Kenneth Casso...
simplify dcache test
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
spelling mistake
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
remove RegStage1.real_adr temporary from dcache
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
do not overwrite parameter ra in dcache
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
comment out dcache_store from test, not the problem
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
remove unneeded code
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
read req in wb_in.stall, dcache
tree
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commitdiff
2021-04-25
Cesar Strauss
Shift-out skipped mask bits for both crpred and intpred
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
add single regression test for dcache
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
add TODO comment in dcache
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
move Signals in dcache to relevant context
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
dcache Elif used where If should have been
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
whoops should be cyc & ~ack
tree
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commitdiff
2021-04-25
Luke Kenneth Casso...
hard-code dcache stall signal to non-pipelined mode
tree
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commitdiff
2021-04-24
Luke Kenneth Casso...
increase memory size in dcache test
tree
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commitdiff
2021-04-24
Luke Kenneth Casso...
increase size of random dcache testing by 10
tree
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commitdiff
2021-04-24
Luke Kenneth Casso...
fix errors in dcache unit test
tree
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commitdiff
2021-04-24
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-04-24
Luke Kenneth Casso...
remove code moved to openpower-isa repo
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
add comments on TestIssuer TestRunner
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
comment tests back in
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
fix import error
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
error in setting fast regs test values
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
import from openpower.tests
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move logical tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
add trap test cases
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move SPR tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move branch test cases to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move LDST tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move mul tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move div tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move div tests to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move ALU test cases to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move MMU Testcase to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move CR test cases to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move shiftrot test cases to openpower.test
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
import from openpower.endian
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
use openpower.test.common
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move more files to openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move to import from openpower-isa for reg enums
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
remove pseudo, moved to openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
remove simulator directory, moved to openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
more openpower-isa conversion
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
correct migration of openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
more openpower import conversion
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
more openpower import conversion
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move over to from openpower imports
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move over to openpower-isa repo
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
move over to openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
moving more over to openpower-isa repo
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
removing more as moved over to openpower-isa
tree
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commitdiff
2021-04-23
Luke Kenneth Casso...
submodule update
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
add debugging and buffering to CacheRam
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
r1.end_row_ix off-by-one in dcache
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
sync missing in dcache
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
dcache.py code-comments
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
cleanup dcache
tree
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commitdiff
2021-04-22
Luke Kenneth Casso...
error using sync, should have been comb
tree
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commitdiff
2021-04-22
Cesar Strauss
Implement CR predication
tree
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commitdiff
2021-04-21
Cesar Strauss
CR sub-fields are stored in MSB0 order
tree
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commitdiff
2021-04-21
Luke Kenneth Casso...
experimenting with dcache
tree
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commitdiff
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