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set terminate if core terminate requested
[soc.git]
/
src
/
2021-12-04
Luke Kenneth Casso...
stop using dar_o from PortInterface, get DAR directly...
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
put DSISR and DAR publicly accessible in LoadStore1
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
whoops fix up exception happened if alignment triggers...
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
fix pi_st which should not be trying to wait for the...
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
fixing DAR updating from exceptions
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
whoops
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
MMU lookup DSISR load bit inverted in LoadStore1
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
store DAR in LoadStore1
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
not busy if excrption occurs on MMU_LOOKUP in loadstore.py
tree
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commitdiff
2021-12-04
Luke Kenneth Casso...
add means to update dsisr from MMU FSM. TODO: add a...
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
priv_mode/virt_mode are set in the request, which is...
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
in loadstore.py set align_intr from request which comes...
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
driver conflict on priv_mode and virt_mode, do not...
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
fix up test_loadstore1.py
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
in loadstore.py, when an exception is done or if the FSM
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
fix PortInterfaceBase
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
fix up LDST test functions pi_ld and pi_st to respect...
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
add misaligned ld/st to trigger an exception
tree
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commitdiff
2021-12-03
Luke Kenneth Casso...
comment out dsisr and dar in mmu FSM for now
tree
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commitdiff
2021-12-02
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2021-12-02
Tobias Platen
cleanup test_compldst_multi_mmu.py
tree
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commitdiff
2021-12-02
Luke Kenneth Casso...
add a bitvector remap function, the plan is to use...
tree
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commitdiff
2021-12-02
Tobias Platen
fix test_random in test_loadstore1
tree
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commitdiff
2021-12-02
Luke Kenneth Casso...
use new namedtuple in core when calling regspec_decode()
tree
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commitdiff
2021-12-02
Luke Kenneth Casso...
add module parameter to regspec_decode and therefore...
tree
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commitdiff
2021-12-02
Jacob Lifshay
remove bitmanip fu cuz ternlogi (the only instruction...
tree
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commitdiff
2021-12-02
Jacob Lifshay
add ternlogi to shiftrot
tree
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commitdiff
2021-12-02
Jacob Lifshay
format code
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
stack of changes to MultiCompUnit to speed it up
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
experimenting with option to shorten MultiCompUnit...
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
create single-stage ALU pipeline, shorten latency on...
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
allow MultiCompUnit to set read and write latches to...
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
FunctionUnitBaseMulti which derives from ReservationSta...
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
better name for read latch in core.py
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
use m.submodules[name] instead of getattr
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
remove redundant / mis-named variable in core
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
code-comments
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
remove unneeded data structure in core
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
whoops treereduce on write-vector set/clr error
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
more code-cleanup
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
use new regspec_decode and fu.get_iospec functions
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
core tidyup
tree
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commitdiff
2021-12-01
Luke Kenneth Casso...
add Regspecs get_io_spec function
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
start allocating more FUs (more ReservationStations)
tree
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commitdiff
2021-11-30
Tobias Platen
random loadstore1 test: readback written data
tree
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commitdiff
2021-11-30
Tobias Platen
reenable dcbz test case
tree
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commitdiff
2021-11-30
Tobias Platen
return correct data from microwatt
tree
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commitdiff
2021-11-30
Tobias Platen
cleanup test_loadstore1.py
tree
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commitdiff
2021-11-30
Tobias Platen
loadstore: add done_delay
tree
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commitdiff
2021-11-30
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
add LogicalTestCases back in to test_core.py (pass)
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
let PowerDecode2 decide which operand class to use...
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
use latched readflag (recspec_decode_read "ok") instead...
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
tidyup on read-flag latches
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
fix read-decode information by latching not just the...
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
fix write-after-write hazard checking
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
allow busy to settle before checking state in test_core.py
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
only check regs right at the end in test_core.py overla...
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
move sim call before core run in test_core.py
tree
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commitdiff
2021-11-30
Luke Kenneth Casso...
getting formerly unused test_core.py operational
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
whoops missed make_hazard_vec test
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
whoops do the set/get of the write-vector at a single...
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
always set fwd_bus_mode=False on regfiles
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
add MMU and SPR to list of FUs that must report "busy...
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
disallow overlap in core on LDST, Branch, and Trap.
tree
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commitdiff
2021-11-29
Luke Kenneth Casso...
use dict style not setattr on submodules
tree
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commitdiff
2021-11-28
Tobias Platen
update loadstore1 testcase
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
code-comments
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
fix instructions of the type "read-reg-is-same-as-write"
tree
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commitdiff
2021-11-27
Tobias Platen
loadstore testcase: read at random addresses
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
FU-Regs matrix tidyup and comments
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
minor tidyup on FU-Regs Matrix
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
update FURegDepMatrix to multi-dest
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commitdiff
2021-11-27
Luke Kenneth Casso...
update naming on Reg_Rsv signals
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
add copyright and attribution notices
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
update FU_RW_Pending vectors to multi-dest
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commitdiff
2021-11-27
Luke Kenneth Casso...
convert DependencyRow to multiple destination latches
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
add copyright and attribution notices to dependence_cell.py
tree
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commitdiff
2021-11-27
Luke Kenneth Casso...
update license and attribution in fu_reg_matrix.py
tree
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commitdiff
2021-11-26
Luke Kenneth Casso...
convert score6600_multi over to using RegSpecs (in...
tree
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commitdiff
2021-11-26
Luke Kenneth Casso...
early use of Array unnecessarily (all uses are static...
tree
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commitdiff
2021-11-26
Luke Kenneth Casso...
early use of Array unnecessarily (all uses are static...
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
get score6600_multi operational again
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
add debug prints in old simulator
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
add debug prints in old simulator
tree
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commitdiff
2021-11-25
Tobias Platen
seperate invalid test case from other test cases
tree
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commitdiff
2021-11-25
Tobias Platen
mmu: add debug output
tree
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commitdiff
2021-11-25
Tobias Platen
add testcase for invalid pagetable
tree
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commitdiff
2021-11-25
Tobias Platen
pimem: reset on exception
tree
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commitdiff
2021-11-25
Tobias Platen
remove unuses dsisr signal
tree
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commitdiff
2021-11-25
Tobias Platen
reset state to idle on exception
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
more sorting scoremulti
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
more sorting out scoremulti
tree
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commitdiff
2021-11-25
Luke Kenneth Casso...
add test pspec for scoremulti to work
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commitdiff
2021-11-24
Luke Kenneth Casso...
convert hazard bitvectors to Reset-Priority SRLatch...
tree
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commitdiff
2021-11-24
Tobias Platen
fix exception handling in pi_ld
tree
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commitdiff
2021-11-24
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2021-11-24
Tobias Platen
improve debug output in mmu.py
tree
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commitdiff
2021-11-24
Luke Kenneth Casso...
fix write-after-write hazard detection
tree
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commitdiff
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