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icache.py fixed all errors that raised python exceptions, now runs sim, sim doenst...
[soc.git] / src /
2020-09-24 Cole Poiriericache.py fixed all errors that raised python exception... tree | commitdiff
2020-09-24 Cesar StraussFix whitespace, remove unused imports tree | commitdiff
2020-09-24 Luke Kenneth Casso... brackets round imports looks cleaner? tree | commitdiff
2020-09-24 Luke Kenneth Casso... add jtag c4m pins which gives us a way to connect IO... tree | commitdiff
2020-09-24 Cesar StraussUse nmutil simulator module to simplify choosing among... tree | commitdiff
2020-09-23 Luke Kenneth Casso... cs_n and cke in sdram need to match in length tree | commitdiff
2020-09-23 Luke Kenneth Casso... change litex sdram pinouts to ASIC type tree | commitdiff
2020-09-23 Luke Kenneth Casso... redo litex SDCard to send out data/cmd o/i/en pins tree | commitdiff
2020-09-23 Luke Kenneth Casso... sort out GPIO with i/o/oe in ls180 tree | commitdiff
2020-09-23 Luke Kenneth Casso... add ls180 pinmap text file tree | commitdiff
2020-09-23 Luke Kenneth Casso... attempt GPIO bi-directional tree | commitdiff
2020-09-23 Luke Kenneth Casso... add I2C master to ls180 tree | commitdiff
2020-09-22 Luke Kenneth Casso... add 2 PWMs (quick, easy to do) tree | commitdiff
2020-09-22 Luke Kenneth Casso... move dmi_sim to separate module tree | commitdiff
2020-09-22 Jacob LifshayRevert "disable pia in div tests" tree | commitdiff
2020-09-22 Luke Kenneth Casso... add openocd.cfg experiment tree | commitdiff
2020-09-22 Luke Kenneth Casso... create a JTAG platform and connect it up. jtagremote... tree | commitdiff
2020-09-22 Luke Kenneth Casso... add jtagremote to litex sim, add new "variant" to core... tree | commitdiff
2020-09-22 Luke Kenneth Casso... link litex ls180soc JTAG pads tree | commitdiff
2020-09-22 Luke Kenneth Casso... add jtag wishbone and jtag ports to libresoc litex... tree | commitdiff
2020-09-22 Luke Kenneth Casso... add jtag interface to issuer_verilog tree | commitdiff
2020-09-22 Luke Kenneth Casso... add sys_rst to Clock Reset Generator tree | commitdiff
2020-09-22 Luke Kenneth Casso... add JTAG IOpads and rename rst to sys_rst tree | commitdiff
2020-09-22 Luke Kenneth Casso... add similar platforms to ls180.py tree | commitdiff
2020-09-22 Luke Kenneth Casso... add JTAG bus module tree | commitdiff
2020-09-22 Luke Kenneth Casso... split out dmi2jtag into own unit test tree | commitdiff
2020-09-22 Cesar StraussPort soc.experiment.alu_fsm to the new way of invoking... tree | commitdiff
2020-09-22 Luke Kenneth Casso... disable pia in div tests tree | commitdiff
2020-09-22 Luke Kenneth Casso... add MMU (commented out) tree | commitdiff
2020-09-21 Luke Kenneth Casso... add missing file tree | commitdiff
2020-09-21 Luke Kenneth Casso... add quick wishbone jtag test tree | commitdiff
2020-09-21 Luke Kenneth Casso... experiment set dmi msr read tree | commitdiff
2020-09-21 Luke Kenneth Casso... add DMI JTAG test tree | commitdiff
2020-09-21 Luke Kenneth Casso... add JTAG basic unit test tree | commitdiff
2020-09-21 Luke Kenneth Casso... arg complete rewrite of JTAG2DMI, based it on staf... tree | commitdiff
2020-09-20 Cesar StraussAdd induction proof for the FSM Shifter tree | commitdiff
2020-09-20 Cesar StraussAdd bounded proof to FSM Shifter tree | commitdiff
2020-09-20 Cesar StraussLet the formal engine create some test cases for the... tree | commitdiff
2020-09-20 Luke Kenneth Casso... resolve issues in async sim: must not drive async clock... tree | commitdiff
2020-09-20 Luke Kenneth Casso... still experimenting with async FF sync tree | commitdiff
2020-09-20 Luke Kenneth Casso... continuing async clock experimenting tree | commitdiff
2020-09-20 Luke Kenneth Casso... add an async clock synchronizer experiment tree | commitdiff
2020-09-20 Luke Kenneth Casso... first version code-morph on dmi2jtag tree | commitdiff
2020-09-19 Luke Kenneth Casso... add pc_o not connected tree | commitdiff
2020-09-19 Luke Kenneth Casso... set ROM to empty, set SRAM to tiny 0x200, get things... tree | commitdiff
2020-09-19 Cesar StraussRemove demonstration code tree | commitdiff
2020-09-19 Luke Kenneth Casso... urk. wishbone slave devices declared incorrectly (I... semi_working_ecp5 tree | commitdiff
2020-09-19 Luke Kenneth Casso... disable internal RAM set SRAM to much smaller tree | commitdiff
2020-09-19 Luke Kenneth Casso... shrink size of SRAM to 8k, move things around tree | commitdiff
2020-09-19 Luke Kenneth Casso... add (disabled) tri-state GPIO tree | commitdiff
2020-09-19 Luke Kenneth Casso... remove the gpio peripheral which was previously hard... tree | commitdiff
2020-09-19 Luke Kenneth Casso... add 3x EINTs to ls180soc tree | commitdiff
2020-09-18 Luke Kenneth Casso... add SPI, sdcard, preliminary GPIO to ls180 pinouts tree | commitdiff
2020-09-18 Luke Kenneth Casso... argh got fed up trying to shoe-horn into sim.py tree | commitdiff
2020-09-18 Luke Kenneth Casso... can remove unneeded overrides of Prev/Next Control tree | commitdiff
2020-09-17 Jacob Lifshayadd divwe regression test case tree | commitdiff
2020-09-17 Jacob Lifshayre-enable test case -- no longer goes into an infinite... tree | commitdiff
2020-09-17 Jacob Lifshayfix bug #492 tree | commitdiff
2020-09-17 Jacob Lifshayreplace sim._state.timeline.now with sim._engine.now tree | commitdiff
2020-09-17 Luke Kenneth Casso... add versa ecp5 fpga litex build script tree | commitdiff
2020-09-16 Cole Poiriercomplete first translation pass of dmi_dtm_xilinx.vhdl... tree | commitdiff
2020-09-16 Luke Kenneth Casso... make a start on LS180 platform tree | commitdiff
2020-09-16 Cole Poirierinitial commit of JTAGToDMI debug interface translated... tree | commitdiff
2020-09-16 Cole Poirieradd template file/starting point (copy of litex/boards... tree | commitdiff
2020-09-15 Luke Kenneth Casso... add back (totally confusing) accidentally-removed code... tree | commitdiff
2020-09-15 Luke Kenneth Casso... instantiate MMU from AllFunctionUnits tree | commitdiff
2020-09-15 Luke Kenneth Casso... do not need FAST regs in MMU tree | commitdiff
2020-09-15 Luke Kenneth Casso... comment mmu test tree | commitdiff
2020-09-15 Luke Kenneth Casso... add edge-triggering to dcache/mmu "valid" tree | commitdiff
2020-09-15 Luke Kenneth Casso... add set MTSPR prtbl to mmu unit test tree | commitdiff
2020-09-15 Luke Kenneth Casso... add OP_MFSPR to mmu tree | commitdiff
2020-09-15 Luke Kenneth Casso... use convenience vars tree | commitdiff
2020-09-15 Luke Kenneth Casso... add OP_TLBIE to mmu fsm tree | commitdiff
2020-09-15 Luke Kenneth Casso... add OP_DCBZ to mmu fsm, needs RA to be added to MMU... tree | commitdiff
2020-09-15 Luke Kenneth Casso... add MMU MTSPR connection into FSM tree | commitdiff
2020-09-15 Luke Kenneth Casso... add in MMU and DCache into MMU FSM tree | commitdiff
2020-09-15 Luke Kenneth Casso... moved PLRU to nmutil tree | commitdiff
2020-09-15 Luke Kenneth Casso... add mmu fsm tree | commitdiff
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in... tree | commitdiff
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in... tree | commitdiff
2020-09-15 Luke Kenneth Casso... remove more (confusing/spurious) types, should be in... tree | commitdiff
2020-09-15 Luke Kenneth Casso... removed (confusing/spurious) types, should be in .pyi... tree | commitdiff
2020-09-15 Luke Kenneth Casso... add MMU FunctionUnit tree | commitdiff
2020-09-15 Luke Kenneth Casso... mmu uses RB, go with it tree | commitdiff
2020-09-15 Luke Kenneth Casso... add OP_TLBIE tree | commitdiff
2020-09-15 Luke Kenneth Casso... add mmu initial pipe_data.py tree | commitdiff
2020-09-15 Luke Kenneth Casso... add extra "modes" to PortInterface tree | commitdiff
2020-09-15 Luke Kenneth Casso... syntax error correction tree | commitdiff
2020-09-15 Luke Kenneth Casso... add inline comments into icache.py tree | commitdiff
2020-09-14 Cole Poiriericache.py add missing funciton bodies, add missing... tree | commitdiff
2020-09-14 Luke Kenneth Casso... increase TLB_NUM_WAYS to 4 tree | commitdiff
2020-09-14 Luke Kenneth Casso... vhdl conversion not really working for plru tree | commitdiff
2020-09-14 Luke Kenneth Casso... add array signal names tree | commitdiff
2020-09-14 Luke Kenneth Casso... rename plru input tree | commitdiff
2020-09-14 Luke Kenneth Casso... rename plru input tree | commitdiff
2020-09-14 Luke Kenneth Casso... reorg mmu lookup test so it is called twice tree | commitdiff
2020-09-14 Luke Kenneth Casso... TLB PLRUs are of TLB_WAY_BITS width tree | commitdiff
2020-09-14 Luke Kenneth Casso... fix mmu perms/lookup in dcache tree | commitdiff
2020-09-14 Luke Kenneth Casso... whitespace tree | commitdiff
2020-09-14 Luke Kenneth Casso... remove duplicated signal tree | commitdiff
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