mesa.git
4 years agost/mesa: allow TXB2/TXL2 to work with cube array shadow textures
Ilia Mirkin [Mon, 2 Mar 2020 02:55:59 +0000 (21:55 -0500)]
st/mesa: allow TXB2/TXL2 to work with cube array shadow textures

It's a bit asymmetric, but it's such a contrived use-case, and not a lot
of drivers will support it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>

4 years agonv50,nvc0: add newly added PIPE_CAP's to list
Ilia Mirkin [Mon, 2 Mar 2020 00:14:02 +0000 (19:14 -0500)]
nv50,nvc0: add newly added PIPE_CAP's to list

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>

4 years agoanv: multiply the scratch space by 4 on gen9-10 like iris and i965
Paulo Zanoni [Sat, 29 Feb 2020 00:03:02 +0000 (16:03 -0800)]
anv: multiply the scratch space by 4 on gen9-10 like iris and i965

My understanding is that there's no reason for the scratch space
allocation to be different between iris, i965 and anv. Let's make all
the functions behave the same.

I don't know if this fixes any specific gen9 bugs, it it might since
it increases the scratch space.

v2: Rebase.
v3: Rebase.
v4: Remove redundant gen 11 check (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>

4 years agointel/device: bdw_gt1 actually has 6 eus per subslice
Paulo Zanoni [Fri, 24 Jan 2020 22:41:25 +0000 (14:41 -0800)]
intel/device: bdw_gt1 actually has 6 eus per subslice

Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.

v2: improve commit message, cc stable (Lionel).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>

4 years agointel: fix the gen 12 compute shader scratch IDs
Paulo Zanoni [Fri, 28 Feb 2020 23:16:07 +0000 (15:16 -0800)]
intel: fix the gen 12 compute shader scratch IDs

This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".

The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.

According to Mark, this fixes the following piglit tests on TGL:

    piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
    piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
    piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64

v2: s/ICL+/Gen11+/ (Jason).

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>

4 years agointel: fix the gen 11 compute shader scratch IDs
Paulo Zanoni [Fri, 31 Jan 2020 23:51:41 +0000 (15:51 -0800)]
intel: fix the gen 11 compute shader scratch IDs

Scratch space allocation is based on the number of threads in the base
configuration, and we only have one base configuration for ICL, with 8
subslices.

This fixes an issue with Aztec on Vulkan in a machine with a
configuration that's not the base. The issue looks like a regression
from b9e93db20896, but it seems things are broken since forever, just
not easily reproducible.

v2: Reimplement it using the subslices variable. Don't touch TGL.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>

4 years agopan/bi: Move some definitions from disasm to bifrost.h
Alyssa Rosenzweig [Mon, 2 Mar 2020 21:45:15 +0000 (16:45 -0500)]
pan/bi: Move some definitions from disasm to bifrost.h

These are generally useful outside the disassmbler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Structify FMA_FADD
Alyssa Rosenzweig [Mon, 2 Mar 2020 21:42:36 +0000 (16:42 -0500)]
pan/bi: Structify FMA_FADD

Just to make it easier to work with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Squash LD_ATTR ops together
Alyssa Rosenzweig [Mon, 2 Mar 2020 21:27:31 +0000 (16:27 -0500)]
pan/bi: Squash LD_ATTR ops together

*whistles*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Combine LOAD_VARYING_ADDRESS instructions by type
Alyssa Rosenzweig [Mon, 2 Mar 2020 21:12:54 +0000 (16:12 -0500)]
pan/bi: Combine LOAD_VARYING_ADDRESS instructions by type

It's all a single opcode in fact.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Decode ADD_SHIFT properly
Alyssa Rosenzweig [Mon, 2 Mar 2020 21:05:48 +0000 (16:05 -0500)]
pan/bi: Decode ADD_SHIFT properly

Just like FMA_SHIFT, but with some bits shuffled around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Identify extended FMA opcodes
Alyssa Rosenzweig [Mon, 2 Mar 2020 12:57:51 +0000 (07:57 -0500)]
pan/bi: Identify extended FMA opcodes

When the top 3 bits of the opcode are 111, it leads to a special
extended opcode mode instead.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Add v4i8 mode to FMA_SHIFT
Alyssa Rosenzweig [Mon, 2 Mar 2020 12:38:38 +0000 (07:38 -0500)]
pan/bi: Add v4i8 mode to FMA_SHIFT

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Decode FMA_SHIFT properly
Alyssa Rosenzweig [Mon, 2 Mar 2020 12:35:49 +0000 (07:35 -0500)]
pan/bi: Decode FMA_SHIFT properly

The shift-bitwise ops are fairly configurable, let's decode this the
right way. Choo choo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Move notes on ADD ops to notes file
Alyssa Rosenzweig [Sun, 1 Mar 2020 16:51:01 +0000 (11:51 -0500)]
pan/bi: Move notes on ADD ops to notes file

Again, we'd like to see just the opcode table more clearly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Introduce CSEL4 class
Alyssa Rosenzweig [Sun, 1 Mar 2020 16:40:21 +0000 (11:40 -0500)]
pan/bi: Introduce CSEL4 class

All of these "ops" are just variants on the same.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Move notes on FMA opcodes from disassembler
Alyssa Rosenzweig [Sun, 1 Mar 2020 16:22:36 +0000 (11:22 -0500)]
pan/bi: Move notes on FMA opcodes from disassembler

We're going to be shuffling around the opcode table, so let's get this
moved out first.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Add ICMP.GL.NEQ op
Alyssa Rosenzweig [Fri, 28 Feb 2020 12:06:35 +0000 (07:06 -0500)]
pan/bi: Add ICMP.GL.NEQ op

A fused not useful to feed into `discard`.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/bi: Add discard ops
Alyssa Rosenzweig [Fri, 28 Feb 2020 12:05:31 +0000 (07:05 -0500)]
pan/bi: Add discard ops

These run on the ADD unit and evidently need to be their own clause
(probably treated as a high-latency instruction). Like csel, they can
either do a float comparison directly or ingest a 0/1 value.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/decode: Skip analysis for Bifrost tiler structures
Alyssa Rosenzweig [Fri, 28 Feb 2020 12:25:25 +0000 (07:25 -0500)]
pan/decode: Skip analysis for Bifrost tiler structures

We don't understand the Bifrost at all yet, so let's just print and move
on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/decode: Fix tiler weights printing
Alyssa Rosenzweig [Fri, 28 Feb 2020 12:25:07 +0000 (07:25 -0500)]
pan/decode: Fix tiler weights printing

Theoretical - still always zero.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/decode: Restore bifrost sample_locations
Alyssa Rosenzweig [Fri, 28 Feb 2020 12:17:53 +0000 (07:17 -0500)]
pan/decode: Restore bifrost sample_locations

Code by Connor Abbott, reverting a part of
254f40fd535ef57dee2bcc4afd97840749ce5918 where it was removed during a
Midgard refactor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agopan/decode: Calm an assert to a pandecode error
Alyssa Rosenzweig [Tue, 25 Feb 2020 22:29:55 +0000 (17:29 -0500)]
pan/decode: Calm an assert to a pandecode error

We'd like to see what the problem actually was...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4025>

4 years agoiris: Wait for the GPU to be idle before invalidating the aux table.
Rafael Antognolli [Tue, 25 Feb 2020 23:08:32 +0000 (15:08 -0800)]
iris: Wait for the GPU to be idle before invalidating the aux table.

An end of pipe sync seems to satisfy this restriction. It takes care of
GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agoiris: Split aux map initialization from invalidation.
Rafael Antognolli [Tue, 25 Feb 2020 23:04:08 +0000 (15:04 -0800)]
iris: Split aux map initialization from invalidation.

We can write the aux map address only once during the batch
initialization, and then only invalidate it once we modify it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agoanv: Wait for the GPU to be idle before invalidating the aux table.
Rafael Antognolli [Fri, 28 Feb 2020 21:57:07 +0000 (13:57 -0800)]
anv: Wait for the GPU to be idle before invalidating the aux table.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agoanv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall
Jason Ekstrand [Fri, 16 Feb 2018 20:03:22 +0000 (12:03 -0800)]
anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stall

v2: Do end-of-pipe sync after clear depth stencil too (Jason).
v3: Also do end-of-pipe sync before clear depth stencil too (Jason).

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agoanv: Use a proper end-of-pipe sync instead of just CS stall
Jason Ekstrand [Fri, 16 Feb 2018 20:01:34 +0000 (12:01 -0800)]
anv: Use a proper end-of-pipe sync instead of just CS stall

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agoanv: Use the PIPE_CONTROL instead of bits for the CS stall W/A
Jason Ekstrand [Fri, 16 Feb 2018 19:56:31 +0000 (11:56 -0800)]
anv: Use the PIPE_CONTROL instead of bits for the CS stall W/A

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>

4 years agogallivm/tessellator: use private functions for min/max to avoid namespace issues
Dave Airlie [Mon, 2 Mar 2020 06:55:18 +0000 (16:55 +1000)]
gallivm/tessellator: use private functions for min/max to avoid namespace issues

Different builds are failing because of namespace collisions here.

Just fix the MS code to avoid it.

Fixes: bd0188f9eab ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2586
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>

4 years agoegl: allow INVALID format for linux_dmabuf
Ivan Molodetskikh [Thu, 26 Sep 2019 21:45:39 +0000 (00:45 +0300)]
egl: allow INVALID format for linux_dmabuf

As per
https://gitlab.freedesktop.org/wayland/wayland-protocols/commit/fb9b2a87317c77e26283da5f6c9559d709f6fdcd,
the compositor may advertise DRM_FORMAT_MOD_INVALID as a supported
modifier. This patch makes mesa recognize this fact and allow
linux_dmabuf usage with the INVALID modifier in this case.

In case the driver doesn't support modifiers, we can still use
linux-dmabuf protocol instead of the legacy wl_drm interface to create
wl_buffers. This will help compositors to handle these buffers better.

In this commit, the INVALID modifier is allowed to be added to the list
of supported modifiers, and create_wl_buffer will be able to use
linux_dmabuf with an INVALID modifier if the compositor advertised it as
supported.

Signed-off-by: Ivan Molodetskikh <yalterz@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2147>

4 years agolima: add RGBA5551 and RGBA4444 formats
Vasily Khoruzhick [Wed, 26 Feb 2020 07:26:36 +0000 (23:26 -0800)]
lima: add RGBA5551 and RGBA4444 formats

We also need to set channel_layout in pp_frame reg (previously known as
foureight) depending on cbuf format.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>

4 years agoci: Add a disabled-by-default job for GLES3 testing on db410c.
Eric Anholt [Thu, 13 Feb 2020 22:22:38 +0000 (14:22 -0800)]
ci: Add a disabled-by-default job for GLES3 testing on db410c.

Now that we have 7 (soon 8) boards available, there's capacity to be
testing GLES 3.0.  However, due to (it looks like) buffer overflows in the
driver, we end up with flaky test results: 1/60 jobs spuriously failed,
and another 6/60 jobs reported flakes.  At 6 jobs per pipeline, that's way
too high of a failure rate to enable for non-freedreno developers.  Leave
the job present but disabled so that we can do manual test runs for
regressions.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>

4 years agoci: Switch testing on db410c over to LAVA.
Eric Anholt [Wed, 29 Jan 2020 00:20:38 +0000 (16:20 -0800)]
ci: Switch testing on db410c over to LAVA.

This should get us better stability of the db410c boards by having a
smaller per-board software stack, with no disks involved (just initramfs).
Additionally, the new cluster is 7 (soon 8) db410cs, while currently the
docker cluster only has 1/4 of its db410cs still running.

Unfortunately, we have to prepare the fastboot boot image during the ARM
drivers build stage, because LAVA relies on publicly available URLs for
the images to load into the bootloaders of the boards, and the only thing
we have for that is gitlab's artifacts.

Note that this testing relies on the boards being freshly flashed with the
linaro v136 firmware to pick up the initramfs size fixes and to stop the
boot at fastboot.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3661>

4 years agor600/sfn: Don't try to catch exceptions, the driver doesn't throw any
Gert Wollny [Thu, 27 Feb 2020 07:14:15 +0000 (08:14 +0100)]
r600/sfn: Don't try to catch exceptions, the driver doesn't throw any

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>

4 years agor600/sfn: Use static_cast when type is already known
Gert Wollny [Thu, 27 Feb 2020 07:12:16 +0000 (08:12 +0100)]
r600/sfn: Use static_cast when type is already known

In all these cases the type was tested before based, so don't use
dynamic_casts.

Closes #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>

4 years agor600/sfn: Avoid using dynamic_cast to identify type
Gert Wollny [Thu, 27 Feb 2020 07:10:36 +0000 (08:10 +0100)]
r600/sfn: Avoid using dynamic_cast to identify type

v2: Fix typo (maurossi)

Related: #2566

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>

4 years agodocs/features: add v3d driver
Alejandro Piñeiro [Thu, 13 Feb 2020 10:46:10 +0000 (11:46 +0100)]
docs/features: add v3d driver

Now that we bumped the GLES version to 3.1, it makes even more sense
to include the driver here.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2507
Reviewed-by: Jose Maria Casanova <jmcasanova@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3810>

4 years agoaco: pass vars by const &
Albert Astals Cid [Mon, 24 Feb 2020 23:49:01 +0000 (00:49 +0100)]
aco: pass vars by const &

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3935>

4 years agoRevert "gitlab-ci: disable panfrost runners"
Daniel Stone [Mon, 2 Mar 2020 12:14:16 +0000 (12:14 +0000)]
Revert "gitlab-ci: disable panfrost runners"

The infrastructure issues, caused by building electrical works gone
wrong, have been fixed, and the Panfrost LAVA runners are available
again.

This reverts commit a86662c44d7cb2541c3f613805533064219ad11f.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4019>

4 years agoaco: Minor optimization in spill_ctx constructor
Albert Astals Cid [Wed, 26 Feb 2020 21:45:28 +0000 (22:45 +0100)]
aco: Minor optimization in spill_ctx constructor

'register_demand' is passed by value and only copied once; consider moving it to avoid unnecessary copies

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3968>

4 years agoradv: update entrypoints generation from ANV
Samuel Pitoiset [Mon, 24 Feb 2020 16:24:03 +0000 (17:24 +0100)]
radv: update entrypoints generation from ANV

It's a massive rework loosely based on ANV. This introduces separate
dispatch tables for the instance, physical device and device objects.

This will help for implementing internal driver layers for SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3930>

4 years agoradv/sqtt: add support for GFX10
Samuel Pitoiset [Fri, 28 Feb 2020 16:55:54 +0000 (17:55 +0100)]
radv/sqtt: add support for GFX10

All SQTT registers were moved to privileged space on GFX10, to emit
them we need a workaround with COPY_DATA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>

4 years agoac/registers: add definitions for thread trace on GFX10
Samuel Pitoiset [Fri, 28 Feb 2020 16:55:18 +0000 (17:55 +0100)]
ac/registers: add definitions for thread trace on GFX10

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>

4 years agoradv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value
Samuel Pitoiset [Mon, 2 Mar 2020 08:28:39 +0000 (09:28 +0100)]
radv/sqtt: update SPI_CONFIG_CNTL.EXP_PRIORITY_ORDER value

It should be 3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>

4 years agoradv/sqtt: do not assume that the number of shader engines is 4
Samuel Pitoiset [Fri, 28 Feb 2020 16:52:17 +0000 (17:52 +0100)]
radv/sqtt: do not assume that the number of shader engines is 4

It's not always 4, for example on RAVEN there is only one.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>

4 years agoradv/rgp: adjust trace memory/shader clocks to fix frame duration
Samuel Pitoiset [Mon, 2 Mar 2020 08:52:14 +0000 (09:52 +0100)]
radv/rgp: adjust trace memory/shader clocks to fix frame duration

To report microseconds instead of clocks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4018>

4 years agomesa/st: fix formats required for EXT_texture_norm16
Tapani Pälli [Thu, 27 Feb 2020 08:33:33 +0000 (10:33 +0200)]
mesa/st: fix formats required for EXT_texture_norm16

Earlier commit did not take in to account that lists required for
rendering and texturing are parsed separately. This commit simply
removes formats added to the other list.

Fixes: de4eb9a3bb9 ("mesa/st: toggle EXT_texture_norm16 based on format support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3961>

4 years agolima: Add etc1 support
Andreas Baierl [Wed, 19 Feb 2020 09:42:43 +0000 (10:42 +0100)]
lima: Add etc1 support

Layer stride has to be divided by 4. We also have to take care of
the array_size when returning the bo_size.

Drop the affected tests from the fails list.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>

4 years agodoc: Update features.txt for r600 with misc supported features
Uros Bizjak [Sun, 1 Mar 2020 17:27:13 +0000 (18:27 +0100)]
doc: Update features.txt for r600 with misc supported features

Update features.txt with misc supported features for r600,
as reported by glxinfo for Cypress XT [Radeon HD 5870].

Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4010>

4 years agointel/tools/dump_gpu: fix getparam values
Lionel Landwerlin [Fri, 28 Feb 2020 08:46:53 +0000 (10:46 +0200)]
intel/tools/dump_gpu: fix getparam values

Don't return the pci_id for all params

Fixes: 76bf38eaf0b6 ("intel/tools/aub_dump: move aub file initialization to maybe_init()")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3994>

4 years agomeson: Enable -Wno-deprecated only for bison > 2.3.
Vinson Lee [Fri, 28 Feb 2020 05:01:55 +0000 (21:01 -0800)]
meson: Enable -Wno-deprecated only for bison > 2.3.

Older versions of bison do not support the -W option.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2571
Fixes: 11a1cb2fa8da ("meson: Disable bison's -Wdeprecated since we still support old bison.")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3993>

4 years agomesa: fix _mesa_draw_nonzero_divisor_bits to return nonzero divisors
Ilia Mirkin [Sun, 1 Mar 2020 03:08:14 +0000 (22:08 -0500)]
mesa: fix _mesa_draw_nonzero_divisor_bits to return nonzero divisors

The bitmask is _EffEnabledNonZeroDivisor, so no need to invert it before
returning.

Fixes: fd6636ebc06d (st/mesa: simplify determination whether a draw needs min/max index)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4009>

4 years agogitlab-ci: disable panfrost runners
Ilia Mirkin [Sun, 1 Mar 2020 20:29:32 +0000 (15:29 -0500)]
gitlab-ci: disable panfrost runners

They seem to be timing out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4011>

4 years agoradv: fix size of sqtt_file_chunk_asic_info on 32-bit system
Samuel Pitoiset [Fri, 28 Feb 2020 14:37:34 +0000 (15:37 +0100)]
radv: fix size of sqtt_file_chunk_asic_info on 32-bit system

The struct is actually 716 bytes, but on 64-bit systems the compiler
aligns it to 720. Add padding to make sure it's always 720.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>

4 years agoradv: fix 32-bit build failure in radv_queue_internal_submit()
Samuel Pitoiset [Fri, 28 Feb 2020 13:23:16 +0000 (14:23 +0100)]
radv: fix 32-bit build failure in radv_queue_internal_submit()

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2580
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2578
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3996>

4 years agoglsl: add some error checks to the nir uniform linker
Timothy Arceri [Mon, 17 Feb 2020 00:01:50 +0000 (11:01 +1100)]
glsl: add some error checks to the nir uniform linker

These are optional for spirv but it shouldnt hurt to enable them.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: fix sampler index calculation in nir linker
Timothy Arceri [Fri, 28 Feb 2020 01:13:55 +0000 (12:13 +1100)]
glsl: fix sampler index calculation in nir linker

Here we reset the counter to 0 for each shader stage not each program.
We also make add a flag to stop iterating over indices that have
already been processed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: reset next_image_index count for each shader stage
Timothy Arceri [Sun, 9 Feb 2020 22:19:44 +0000 (09:19 +1100)]
glsl: reset next_image_index count for each shader stage

This fixes the image index calculation in the nir linker. We need
to reset the counter to 0 for each shader stage not each program.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: fix resizing of the uniform remap table
Timothy Arceri [Thu, 6 Feb 2020 01:49:10 +0000 (12:49 +1100)]
glsl: fix resizing of the uniform remap table

In the NIR linker we were not resizing the remap table correctly
for explicit locations when it was needed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: set the correct number of images in a shader
Timothy Arceri [Thu, 27 Feb 2020 22:53:51 +0000 (09:53 +1100)]
glsl: set the correct number of images in a shader

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: set the correct number of samplers in a shader
Timothy Arceri [Thu, 20 Feb 2020 22:34:26 +0000 (09:34 +1100)]
glsl: set the correct number of samplers in a shader

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agoglsl: fix possible memory leak in nir uniform linker
Timothy Arceri [Wed, 26 Feb 2020 02:21:20 +0000 (13:21 +1100)]
glsl: fix possible memory leak in nir uniform linker

Use UniformDataSlots for the context of UniformDataDefaults rather
than UniformStorage as in some cause UniformStorage may be NULL.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3992>

4 years agointel/compiler: Restrict cs_threads to 64
Jordan Justen [Thu, 24 Oct 2019 18:55:23 +0000 (11:55 -0700)]
intel/compiler: Restrict cs_threads to 64

Our current GPGPU_WALKER code only supports up to 64 threads.

On HSW we could use up to 70 and TGL up to 112, but only if the walker
is adjusted so the width does not exceed 64. Work to support this is
in progress.

Previous to this change, we might try to downgrade to SIMD8 if the
SIMD16 shader spilled. Since HSW and TGL have the max number of
threads above 64, we would then try to emit an invalid GPGPU walker
command.

Fixes: 932045061b5 ("i965/cs: Emit compute shader code and upload programs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
4 years agost/va: remove unneeded code
Thong Thai [Fri, 28 Feb 2020 15:15:17 +0000 (10:15 -0500)]
st/va: remove unneeded code

No need to explicitly set the 10-bit buffer format as the correct
buffer format will be allocated later

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>

4 years agofreedreno/ir3: add assert
Rob Clark [Fri, 28 Feb 2020 00:13:01 +0000 (16:13 -0800)]
freedreno/ir3: add assert

Catch problems earlier when inputs are not setup correctly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: fix assert with getinfo
Rob Clark [Wed, 26 Feb 2020 16:21:32 +0000 (08:21 -0800)]
freedreno/ir3: fix assert with getinfo

Fixes:
dEQP-VK.glsl.texture_functions.query.texturesamples.sampler2dms_fixed_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: don't precolor unassigned inputs
Rob Clark [Wed, 26 Feb 2020 01:17:55 +0000 (17:17 -0800)]
freedreno/ir3: don't precolor unassigned inputs

Fixes crash seen in:
dEQP-VK.glsl.conversions.matrix_to_matrix.mat4_to_mat3x4_vertex

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: fix crash with samgq workaround
Rob Clark [Wed, 26 Feb 2020 00:37:26 +0000 (16:37 -0800)]
freedreno/ir3: fix crash with samgq workaround

Need to list_delinit() before we clone the instruction to split it into
individual samgpN instructions, otherwise we get list corruption.

Tested-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: update SFU delay
Rob Clark [Tue, 25 Feb 2020 18:44:26 +0000 (10:44 -0800)]
freedreno/ir3: update SFU delay

1) emperically, 10 seems like a more accurate # than 4
2) push "soft" delay handling into ir3_delayslots(), as
   we should also be using it to calculate the costs
   that the schedulers use

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: track half-precision live values
Rob Clark [Mon, 24 Feb 2020 22:46:04 +0000 (14:46 -0800)]
freedreno/ir3: track half-precision live values

In schedule live value tracking, differentiate between half vs full
precision.  Half-precision live values are less costly than full
precision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: don't hide latency when there is none to hide
Rob Clark [Mon, 24 Feb 2020 22:16:15 +0000 (14:16 -0800)]
freedreno/ir3: don't hide latency when there is none to hide

Current scheduler thresholds try to ensure there are warps available to
switch to when hiding texture fetch latency.  But if there is none to
hide, we should allow scheduler to use more registers to reduce nops.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: rewrite regmask to better support a6xx+
Rob Clark [Mon, 24 Feb 2020 19:57:52 +0000 (11:57 -0800)]
freedreno/ir3: rewrite regmask to better support a6xx+

To avoid spurious sync flags, we want to, for a6xx+, operate in terms of
half-regs, with a full precision register testing the corresponding two
half-regs that it conflicts with.

And while we are at it, stop open-coding BITSET

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: remove regmask_set_if_not()
Rob Clark [Mon, 24 Feb 2020 19:55:29 +0000 (11:55 -0800)]
freedreno/ir3: remove regmask_set_if_not()

No longer used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno: honor FD_MESA_DEBUG=nogrow
Rob Clark [Fri, 21 Feb 2020 21:10:09 +0000 (13:10 -0800)]
freedreno: honor FD_MESA_DEBUG=nogrow

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/a6xx: enable SKIP_IB2_ENABLE properly
Rob Clark [Fri, 21 Feb 2020 16:42:12 +0000 (08:42 -0800)]
freedreno/a6xx: enable SKIP_IB2_ENABLE properly

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/a6xx: don't emit YIELD packet
Rob Clark [Fri, 21 Feb 2020 16:30:59 +0000 (08:30 -0800)]
freedreno/a6xx: don't emit YIELD packet

We don't implement the rest of this.. and it would probably cause bad
things when kernel gains support for preemption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/a6xx: whitespace fix
Rob Clark [Fri, 21 Feb 2020 16:30:47 +0000 (08:30 -0800)]
freedreno/a6xx: whitespace fix

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/a6xx: emit LRZ clear in sysmem too
Rob Clark [Sat, 1 Feb 2020 21:57:12 +0000 (13:57 -0800)]
freedreno/a6xx: emit LRZ clear in sysmem too

Fixes rendering issues in manhattan with FD_MESA_DEBUG=nogmem

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/a6xx: remove unused param
Rob Clark [Mon, 24 Feb 2020 16:18:25 +0000 (08:18 -0800)]
freedreno/a6xx: remove unused param

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agofreedreno/ir3: remove from_tgsi
Rob Clark [Mon, 24 Feb 2020 16:16:34 +0000 (08:16 -0800)]
freedreno/ir3: remove from_tgsi

No longer used, other than in ir3 cmdline compiler, where it can be
replaced with a local variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>

4 years agoturnip: increase array sizes in tu_descriptor_map
Jonathan Marek [Thu, 27 Feb 2020 19:30:28 +0000 (14:30 -0500)]
turnip: increase array sizes in tu_descriptor_map

Pending the descriptor rework, this allows running the follow test:
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_127

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: fall back to sysmem when attachments don't fit into gmem
Jonathan Marek [Thu, 27 Feb 2020 19:29:05 +0000 (14:29 -0500)]
turnip: fall back to sysmem when attachments don't fit into gmem

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: remove unnecessary fb size check
Jonathan Marek [Thu, 27 Feb 2020 16:20:59 +0000 (11:20 -0500)]
turnip: remove unnecessary fb size check

Framebuffer with 0 width or height is not valid.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: don't hardcode gmem base for input attachment
Jonathan Marek [Thu, 27 Feb 2020 16:18:45 +0000 (11:18 -0500)]
turnip: don't hardcode gmem base for input attachment

Newer a6xx no longer has programmable GMEM base, so we can't rely on the
kernel driver setting it to 0x100000 (GMEM base is 0 on such GPUs).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: fix srgb MRT
Jonathan Marek [Thu, 27 Feb 2020 15:22:02 +0000 (10:22 -0500)]
turnip: fix srgb MRT

Register packing macros makes this only set the first bit. Set to whole
dword to fix srgb for color attachments >0.

Fixes: 59f29fc8 ("turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: fix hw binning + render_area offset interaction
Jonathan Marek [Tue, 25 Feb 2020 14:28:34 +0000 (09:28 -0500)]
turnip: fix hw binning + render_area offset interaction

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: minify image_view extent
Jonathan Marek [Wed, 12 Feb 2020 03:16:22 +0000 (22:16 -0500)]
turnip: minify image_view extent

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: remove unecessary MRT_CONTROL fill
Jonathan Marek [Wed, 12 Feb 2020 02:13:38 +0000 (21:13 -0500)]
turnip: remove unecessary MRT_CONTROL fill

Hardware won't use MRT_CONTROL after mrt_count

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: move some constant state to tu6_init_hw
Jonathan Marek [Wed, 12 Feb 2020 02:12:25 +0000 (21:12 -0500)]
turnip: move some constant state to tu6_init_hw

Also remove duplicates.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: check the right alignment requirement on shader iova
Jonathan Marek [Wed, 12 Feb 2020 02:11:07 +0000 (21:11 -0500)]
turnip: check the right alignment requirement on shader iova

I had some trouble because I assumed this was right, tested that the
alignment requirement is actually 16.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

4 years agoturnip: add r5g5b5a1_unorm/b5g5r5a1_unorm formats
Jonathan Marek [Thu, 27 Feb 2020 20:35:54 +0000 (15:35 -0500)]
turnip: add r5g5b5a1_unorm/b5g5r5a1_unorm  formats

r5g5b5a1/b5g5r5a1 tiled/ubwc is the same as a1r5g5b5 (in memory), but
linear is read as 1_5_5_5 and written with 5_5_5_1 with swap.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>

4 years agoturnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm
Jonathan Marek [Thu, 13 Feb 2020 00:57:49 +0000 (19:57 -0500)]
turnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm

These formats are an exception that can't be modeled in the current format
table. Switch to a table with only a single a6xx_format per vk format,
and deal with the exceptions separately (currently the only exception is
10_10_10_2_UNORM which has a different color format).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>

4 years agoutil/format: add missing BC4/BC5 vulkan formats
Jonathan Marek [Wed, 12 Feb 2020 23:45:28 +0000 (18:45 -0500)]
util/format: add missing BC4/BC5 vulkan formats

Enables these formats for turnip.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>

4 years agopanfrost: LogicOp fixes and non 8-bit format support
Icecream95 [Wed, 26 Feb 2020 09:03:13 +0000 (22:03 +1300)]
panfrost: LogicOp fixes and non 8-bit format support

With the previous LogicOp commit almost half of the blend modes were
broken because the surplus bits were not cleared after an inot.

v2:
 - Remove u8 "fast path" as 8-bit is not well optimised yet
 - Don't mask for 32-bit formats as that triggers an assert

Fixes: 068806c9f6b ("panfrost: LogicOp support")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>

4 years agonir: Allow nir_format conversions to work on 32-bit values
Icecream95 [Wed, 26 Feb 2020 06:29:03 +0000 (19:29 +1300)]
nir: Allow nir_format conversions to work on 32-bit values

The constant has to changed to unsigned long long, as shifting a
32-bit value by 32 is undefined behaviour.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>

4 years agor600: add missing <array> include
Greg V [Wed, 26 Feb 2020 20:12:12 +0000 (23:12 +0300)]
r600: add missing <array> include

Fixes error with clang/libc++:

../src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h:69:88: error: implicit instantiation of undefined template 'std::__1::array<unsigned char, 3>'
   bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2});

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>

4 years agollvmpipe: add support for tessellation shaders
Dave Airlie [Mon, 17 Feb 2020 07:15:38 +0000 (17:15 +1000)]
llvmpipe: add support for tessellation shaders

This adds the hooks between llvmpipe and draw to enable tessellation shaders.

It also updates the CI results and docs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>

4 years agogallium/nir/tgsi: only scan fragment shader inputs for usage_mask
Dave Airlie [Mon, 17 Feb 2020 07:13:58 +0000 (17:13 +1000)]
gallium/nir/tgsi: only scan fragment shader inputs for usage_mask

The scanner doesn't work with tess shaders, but we don't need it for those,
in fact only frag shaders need it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>

4 years agodraw: hook up final bits of tessellation
Dave Airlie [Mon, 17 Feb 2020 07:13:11 +0000 (17:13 +1000)]
draw: hook up final bits of tessellation

This hooks tessellation into various parts of draw, so the
tessellation shaders are used in the correct places as the
last shader of the pipeline.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>