Kenneth Graunke [Wed, 2 Nov 2016 20:35:30 +0000 (13:35 -0700)]
glsl: Update deref types when resizing implicitly sized arrays.
At link time, we resolve the size of implicitly sized arrays.
When doing so, we update the type of the ir_variables. However,
we neglected to update the type of ir_dereference nodes which
reference those variables.
It turns out array_resize_visitor (for GS/TCS/TES interface array
handling) already did 2/3 of the cases for this, so we can simply
refactor the code and reuse it.
This fixes:
GL45-CTS.shader_storage_buffer_object.basic-syntax
GL45-CTS.shader_storage_buffer_object.basic-syntaxSSO
which have an SSBO containing an implicitly sized array, followed
by some other members. setup_buffer_access uses the dereference
types to compute offsets to fields, and it had a stale type where
the implicitly sized array's length was still 0 instead of the
actual length.
While we're here, we can also fix update_array_sizes to properly
update deref types as well, fixing a FINISHME from 2010.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Timothy Arceri [Tue, 1 Nov 2016 22:49:58 +0000 (09:49 +1100)]
mesa/glsl: delete previously linked shaders earlier when linking
This moves the delete linked shaders call to
_mesa_clear_shader_program_data() which makes sure we delete them
before returning due to any validation problems.
It also reduces some code duplication.
From the OpenGL 4.5 Core spec:
"If LinkProgram failed, any information about a previous link of
that program object is lost. Thus, a failed link does not restore
the old state of program.
...
If one of these commands is called with a program for which
LinkProgram failed, no error is generated unless otherwise noted.
Implementations may return information on variables and interface
blocks that would have been active had the program been linked
successfully. In cases where the link failed because the program
required too many resources, these commands may help applications
determine why limits were exceeded."
Therefore it's expected that we shouldn't be able to query the
program that failed to link and retrieve information about a
previously successful link.
Before this change the linker was doing validation before freeing
the previously linked shaders and therefore could exit on failure
before they were freed.
This change also fixes an issue in compat profile where a program
with no shaders attached is expect to fall back to fixed function
but was instead trying to relink IR from a previous link.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97715
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Timothy Arceri [Wed, 2 Nov 2016 22:18:19 +0000 (09:18 +1100)]
nir: fix nir_shader_clone() and nir_sweep()
These were broken in
e1af20f18a8 when the info field in nir_shader was
turned into a pointer.
Clone was copying the pointer rather than the data and nir_sweep was
cleaning up shader_info rather than claiming it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 2 Nov 2016 22:18:18 +0000 (09:18 +1100)]
mesa: move shader_info to the start of gl_program
This will allow use to use ralloc_parent() on the info field and fix
a regression in nir_sweep() caused by
e1af20f18a8.
This is intended to be a temporary requirement that will be removed
when we finish separating shader_info from nir_shader.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 2 Nov 2016 22:18:17 +0000 (09:18 +1100)]
st/mesa/r200/i915/i965: use rzalloc() to create gl_program
This allows us to use ralloc_parent() to see which data structure owns
shader_info which allows us to fix a regression in nir_sweep().
This will also allow us to move some fields from gl_linked_shader to
gl_program, which will allow us to do some clean-ups like storing
gl_program directly in the CurrentProgram array in gl_pipeline_object
enabling some small validation optimisations at draw time.
Also it is error prone to depend on the gl_linked_shader for
programs in current use because a failed linking attempt will free
infomation about the current program. In i965 we could be trying
to recompile a shader variant but may have lost some required fields.
Reviewed-by: Eric Anholt <eric@anholt.net>
Samuel Pitoiset [Wed, 26 Oct 2016 22:08:30 +0000 (00:08 +0200)]
nv50,nvc0: stop limiting the number of active queries to 1
This limitation was initially here because AMD_performance_monitor
doesn't allow to expose the real number of hardware counters. But
this actually really annoying when profiling with qapitrace.
Anyways, performance counters are mostly for developers and
failures are expected if you try to monitor more queries than
supported.
This breaks amd_performance_monitor_measure but it's expected.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Wed, 2 Nov 2016 22:50:03 +0000 (23:50 +0100)]
nvc0: add new warp_nonpred_execution_efficiency metric on SM35
Event not_predicated_off_thread_inst_executed is SM35+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:34:44 +0000 (19:34 +0100)]
nvc0: add missing metric-issue_slot on SM35
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:19:15 +0000 (19:19 +0100)]
nvc0: do not expose metric-inst_issued twice on SM35
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 2 Nov 2016 22:57:25 +0000 (23:57 +0100)]
nvc0: add new warp_execution_efficiency metric on SM30+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:23:21 +0000 (19:23 +0100)]
nvc0: respect 80-chars for perf metrics descriptions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:22:37 +0000 (19:22 +0100)]
nvc0: sort performance metrics alphabetically
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fredrik Höglund [Thu, 27 Oct 2016 01:02:14 +0000 (03:02 +0200)]
radv: add support for anisotropic filtering on VI+
Ported from radeonsi.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 2 Nov 2016 00:33:33 +0000 (00:33 +0000)]
radv: fix dual source blending
Dolphin tried to use this, but we hadn't had any tests for it properly.
All that is required is the shader output format needs to be set
for 0 and 1 exports.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Wed, 8 Jun 2016 19:18:36 +0000 (21:18 +0200)]
nv50: add missing draw_calls_indexed driver stat
Spotted when glancing at the VBO push code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Adam Jackson [Wed, 14 Sep 2016 18:02:56 +0000 (14:02 -0400)]
glx/glvnd: Use bsearch() in FindGLXFunction instead of open-coding it
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Wed, 14 Sep 2016 18:01:13 +0000 (14:01 -0400)]
glx/glvnd: Fix dispatch function names and indices
As this array was not actually sorted, FindGLXFunction's binary search
would only sometimes work.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Wed, 14 Sep 2016 17:56:50 +0000 (13:56 -0400)]
glx/glvnd: Don't modify the dummy slot in the dispatch table
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Jason Ekstrand [Tue, 1 Nov 2016 22:10:29 +0000 (15:10 -0700)]
anv/pipeline: Properly cache prog_data::param
Before we were caching the prog data but we weren't doing anything with
brw_stage_prog_data::param so anything with push constants wasn't getting
cached properly. This commit fixes that.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 23:03:12 +0000 (16:03 -0700)]
anv/pipeline: Put actual pointers in anv_shader_bin
While we can simply calculate offsets to get to things such as the
prog_data and the key, it's much more user-friendly if there are just
pointers. Also, it's a bit more fool-proof.
While we're at it, we rework the pipeline cache API to use the
brw_stage_prog_data type directly.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 21:16:34 +0000 (14:16 -0700)]
intel/blorp: Pass a brw_stage_prog_data to upload_shader
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 21:03:43 +0000 (14:03 -0700)]
intel/blorp: Use wm_prog_data instead of hand-rolling our own
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:51:56 +0000 (17:51 -0700)]
anv: Better handle return codes from anv_physical_device_init
The case where we just want the loop to continue is INCOMPATIBLE_DRIVER
because that simply means that whatever FD we opened isn't a supported
Intel chip. Other error codes such as OUT_OF_HOST_MEMORY are actual errors
and we should be returning early in that case.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:18:30 +0000 (17:18 -0700)]
vulkan/wsi/x11: Clean up connections in finish_wsi
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:16:14 +0000 (17:16 -0700)]
vulkan/wsi/x11: Better handle wsi_x11_connection_create failure
Without this fix, the function would still end up returning NULL but it
would put that NULL connection in the hash table which would be bad.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Chih-Wei Huang [Fri, 28 Oct 2016 09:54:17 +0000 (17:54 +0800)]
android: avoid using libdrm with host modules
Note LOCAL_CFLAGS and LOCAL_SHARED_LIBRARIES in Android.common.mk
are used by both host and target modules. However, commit
112e988
moved libdrm related flags to common. It causes the errors like:
error: 'out/host/linux-x86/obj32/SHARED_LIBRARIES/libdrm_intermediates/export_includes',
needed by 'out/host/linux-x86/obj32/EXECUTABLES/mesa_gen_matypes_intermediates/import_includes',
missing and no known rule to make it
No reason to use libdrm with host modules.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Fixes: 112e988329b ("Android: move libdrm settings to top-level
Android.common.mk")
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Wed, 19 Oct 2016 17:43:39 +0000 (19:43 +0200)]
glsl: compute lvalues of [in]out parameters before inlined function body
This is required when an out argument involves an array index that is either
a global variable modified by the function or another out argument in the
same function call.
Fixes the shaders/out-parameter-indexing/vs-inout-index-inout-* tests.
v2:
- modify the ir_dereference_array nodes in place
- use ir_hierarchical_visitor
v3: use base_ir (Ian Romanick)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Thu, 27 Oct 2016 08:59:37 +0000 (10:59 +0200)]
radeonsi: fix BFE/BFI lowering for GLSL semantics
Fixes spec/arb_gpu_shader5/execution/built-in-functions/*-bitfield{Extract,Insert}
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 08:32:27 +0000 (10:32 +0200)]
tgsi: align the definition of BFI & [UI]BFE with GLSL
As previously written, these opcodes use the SM5 semantics which is
incompatible with GLSL when bits == 0, offset == 32.
At some point we may want to add BFI_SM5 etc. opcodes, but all users
currently either want (and expect!) the GLSL semantics or don't care.
Bitfield inserts are generated by the GLSL lower_instructions and
lower_packing_builtins passes with constant bits and offset arguments,
so any workaround code that drivers may have to emit to follow GLSL
semantics should be optimized away easily for those uses.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Tue, 1 Nov 2016 23:51:43 +0000 (23:51 +0000)]
radv: expose xlib platform extension
I missed this when I added the xlib code, this allows
dolphin emu to start and crash later.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Fri, 14 Oct 2016 23:27:06 +0000 (00:27 +0100)]
intel: aubinator: print field values if available
Turning this :
sampler state 0
Sampler Disable: false
Texture Border Color Mode: 0
LOD PreClamp Enable: 1
Base Mip Level: 0.000000
Mip Mode Filter: 0
Mag Mode Filter: 1
Min Mode Filter: 1
Texture LOD Bias: foo
Anisotropic Algorithm: 0
into this :
sampler state 0
Sampler Disable: false
Texture Border Color Mode: 0 (DX10/OGL)
LOD PreClamp Enable: 1 (OGL)
Base Mip Level: 0.000000
Mip Mode Filter: 0 (NONE)
Mag Mode Filter: 1 (LINEAR)
Min Mode Filter: 1 (LINEAR)
Texture LOD Bias: foo
Anisotropic Algorithm: 0 (LEGACY)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Lionel Landwerlin [Fri, 14 Oct 2016 23:16:25 +0000 (00:16 +0100)]
intel: aubinator: load fields values from xml data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Lionel Landwerlin [Fri, 14 Oct 2016 16:04:50 +0000 (17:04 +0100)]
intel: aubinator: print boolean fields to true with colors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Marek Olšák [Fri, 28 Oct 2016 00:32:51 +0000 (02:32 +0200)]
amd: fix a typo in PIXEL_PIPE_STAT_RESET definition
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 23:13:30 +0000 (01:13 +0200)]
gallium/radeon: add enum radeon_micro_mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 22:14:16 +0000 (00:14 +0200)]
gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 11:47:11 +0000 (13:47 +0200)]
gallium/radeon: remove r600_surface::level_info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 11:42:28 +0000 (13:42 +0200)]
gallium/radeon: add radeon_surf::is_linear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 16:48:36 +0000 (18:48 +0200)]
gallium/radeon: remove radeon_surf_level::pitch_bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 16:12:07 +0000 (18:12 +0200)]
gallium/radeon: don't call u_format helpers if we have that info already
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 15:43:19 +0000 (17:43 +0200)]
gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 27 Oct 2016 23:55:17 +0000 (01:55 +0200)]
radeonsi: add a driver query for counting CP DMA calls
CP DMA calls are synchronous with regard to shaders, but can be made
asynchronous if needed.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 11 Feb 2016 23:58:46 +0000 (00:58 +0100)]
radeonsi: add a driver query for shader cache hits
This is an 8-month old patch.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 27 Oct 2016 15:41:55 +0000 (17:41 +0200)]
gbm: set up the interop extension for egl/drm
breaking libgbm -> libEGL ABI?
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Mon, 31 Oct 2016 13:54:12 +0000 (14:54 +0100)]
nvc0: do not duplicate similar performance metrics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Emil Velikov [Tue, 1 Nov 2016 16:09:13 +0000 (16:09 +0000)]
docs: add news item and link release notes for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 1 Nov 2016 16:05:32 +0000 (16:05 +0000)]
docs: add sha256 checksums for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
405dd26860719d800ed6134f8f985f1525f25502)
Emil Velikov [Tue, 1 Nov 2016 15:55:24 +0000 (15:55 +0000)]
docs: Update 13.0.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
df1b0a5a86bab8cd138f504942198a300753b005)
Jason Ekstrand [Mon, 31 Oct 2016 23:33:43 +0000 (16:33 -0700)]
anv/device: Return DEVICE_LOST if execbuf2 fails
This makes more sense than OUT_OF_HOST_MEMORY. Technically, you can
recover from a failed execbuf2 but the batch you just submitted didn't
fully execute so things are in an ill-defined state. The app doesn't want
to continue from that point anyway.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Antia Puentes [Fri, 21 Oct 2016 09:40:11 +0000 (11:40 +0200)]
i965/gen8: Fix vertex attrib upload for dvec3/4 shader inputs
The emission of vertex attributes corresponding to dvec3 and dvec4
vertex shader input variables was not correct when the <size> passed
to the VertexAttribL* commands was <= 2.
This was because we were using the vertex array size when emitting vertices
to decide if we uploaded a 64-bit floating point attribute as 1 slot (128-bits)
for sizes 1 and 2, or 2 slots (256-bits) for sizes 3 and 4. This caused problems
when mapping the input variables to registers because, for deciding which
registers contain the values uploaded for a certain variable, we use the size
and type given to the variable in the shader, so we will be assigning 256-bits
to dvec3/4 variables, even if we only uploaded 128-bits for them, which happened
when the vertex array size was <= 2.
The patch uses the shader information to only emit as 128-bits those 64-bit floating
point variables that were declared as double or dvec2 in the vertex shader. Dvec3 and
dvec4 variables will be always uploaded as 256-bits, independently of the <size> given
to the VertexAttribL* command.
From the ARB_vertex_attrib_64bit specification:
"For the 64-bit double precision types listed in Table X.1, no default
attribute values are provided if the values of the vertex attribute variable
are specified with fewer components than required for the attribute
variable. For example, the fourth component of a variable of type dvec4
will be undefined if specified using VertexAttribL3dv or using a vertex
array specified with VertexAttribLPointer and a size of three."
We are filling these unspecified components with zeros, which coincidentally is
also what the GL44-CTS.vertex_attrib_binding.basic-inputL-case1 expects.
v2: Do not use bitcount (Kenneth Graunke)
Fixes: GL44-CTS.vertex_attrib_binding.basic-inputL-case1 test
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97287
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Tue, 1 Nov 2016 05:11:35 +0000 (15:11 +1000)]
radv: drop some unused cmask info members.
These were assigned but never used.
Inspired by similiar patch in radeonsi.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:53 +0000 (12:49 +0100)]
intel: aubinator: fix printing missing gen option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:52 +0000 (12:49 +0100)]
intel: aubinator: fix assumptions on amount of required data
We require 12 bytes of headers but in some cases we just need 4.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:51 +0000 (12:49 +0100)]
intel: aubinator: don't print out blocks twice
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Nanley Chery [Fri, 30 Sep 2016 23:28:53 +0000 (16:28 -0700)]
i965: Move gen8_disable_stages to brw_upload_initial_gpu_state
3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
HZ op, so repeatedly clearing it after every blorp execution is
redundant.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Nanley Chery [Fri, 30 Sep 2016 22:26:19 +0000 (15:26 -0700)]
i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_state
This packet is non-pipelined and doesn't ever change across emissions.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Leo Liu [Mon, 24 Oct 2016 18:03:11 +0000 (14:03 -0400)]
st/omx/dec: disable tunnel for size different case
When the video coded size is different from frame size, we need the result
buffers are same as coded size, which are not size compatible with encode
required size, so that simply use no tunnel for this case instead of frame
by frame converting.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Leo Liu [Mon, 24 Oct 2016 18:03:10 +0000 (14:03 -0400)]
st/omx/dec: result buffers size should match codec decoder size
Otherwise fails the check of matching between decoder size and buffers
size in kernel.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
George Kyriazis [Thu, 20 Oct 2016 16:39:51 +0000 (11:39 -0500)]
swr: [rasterizer] added EventHandlerFile contructor
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Wed, 19 Oct 2016 21:37:36 +0000 (16:37 -0500)]
swr: [rasterizer core] Frontend dependency work
Add frontend dependency concept in the DRAW_CONTEXT, which
allows serialization of frontend work if necessary.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Tue, 18 Oct 2016 20:42:33 +0000 (15:42 -0500)]
swr: [rasterizer core] Refactor/cleanup backends
Used for common code reuse and simplification
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Mon, 17 Oct 2016 23:46:35 +0000 (18:46 -0500)]
swr: [rasterizer core] Remove deprecated simd intrinsics
Used in abandoned all-or-nothing approach to converting to AVX512
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Sat, 15 Oct 2016 22:35:26 +0000 (17:35 -0500)]
swr: [rasterizer archrast] Add thread tags to event files.
This allows the post-processor to easily detect the API thread and to
process frame information. The frame information is needed to
optimized how data is processed from worker threads.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Marek Olšák [Fri, 7 Oct 2016 20:26:58 +0000 (22:26 +0200)]
glsl: use a non-malloc'd storage for short ir_variable names
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_constant_propagation
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_copy_propagation
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_copy_propagation_elements
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_dead_code_local
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:41:10 +0000 (20:41 +0200)]
glsl: use the linear allocator in glsl_symbol_table
no ralloc_free occurences
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 17:17:15 +0000 (19:17 +0200)]
glsl: use the linear allocator for ast_node and derived classes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 15:37:04 +0000 (17:37 +0200)]
glsl/lexer: use the linear allocator
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 02:49:13 +0000 (04:49 +0200)]
glcpp: use the linear allocator for most objects
v2: cosmetic changes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Fri, 7 Oct 2016 02:44:05 +0000 (04:44 +0200)]
ralloc: add a linear allocator as a child node of ralloc
v2: remove goto, cosmetic changes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 6 Oct 2016 22:51:41 +0000 (00:51 +0200)]
ralloc: remove memset from ralloc_size
only do it in rzalloc_size as it was supposed to be
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Marek Olšák [Thu, 6 Oct 2016 22:34:26 +0000 (00:34 +0200)]
ralloc: use rzalloc where it's necessary
No change in behavior. ralloc_size is equivalent to rzalloc_size.
That will change though.
Calls not switched to rzalloc_size:
- ralloc_vasprintf
- glsl_type::name allocation (it's filled with snprintf)
- C++ classes where valgrind didn't show uninitialized values
I switched most of non-glsl stuff to rzalloc without checking whether
it's really needed.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 00:16:12 +0000 (02:16 +0200)]
ralloc: add DECLARE_RZALLOC_CXX_OPERATORS
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>
Juha-Pekka Heikkila [Tue, 11 Oct 2016 10:54:58 +0000 (13:54 +0300)]
nir: zero allocated memory where needed
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Tue, 11 Oct 2016 10:48:16 +0000 (13:48 +0300)]
i965/fs: fill allocated memory with zeros where needed
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Tue, 14 Jun 2016 14:59:04 +0000 (17:59 +0300)]
i965/vec4: zero allocated memory where needed
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Tapani Pälli [Thu, 13 Oct 2016 11:54:30 +0000 (14:54 +0300)]
glsl/glcpp: initialize all fields of glcpp_parser_t on creation
this fixes some of the regressions with
"ralloc: remove memset from ralloc_size"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Thu, 13 Oct 2016 10:43:29 +0000 (13:43 +0300)]
glsl: Fix reading of uninitialized memory
Switch to use memory allocations which zero memory for places
where needed.
v2: modify and rebase on top of Marek's series (Tapani)
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 7 Oct 2016 16:34:13 +0000 (18:34 +0200)]
glsl: initialize glsl_struct_field properly
don't rely on ralloc doing memset
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>
Marek Olšák [Thu, 6 Oct 2016 22:04:28 +0000 (00:04 +0200)]
ralloc: don't memset ralloc_header, clear it manually
time GALLIUM_NOOP=1 ./run shaders/private/alien_isolation/ >/dev/null
Before (2 takes):
real 0m8.734s 0m8.773s
user 0m34.232s 0m34.348s
sys 0m0.084s 0m0.056s
After (2 takes):
real 0m8.448s 0m8.463s
user 0m33.104s 0m33.160s
sys 0m0.088s 0m0.076s
Average change in "real" time spent: -3.4%
calloc should only do 2 things compared to malloc:
- check for overflow of "n * size"
- call memset
I'm not sure if that explains the difference.
v2: clear "parent" and "next" in the caller of add_child.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Serge Martin [Sun, 27 Sep 2015 09:15:14 +0000 (11:15 +0200)]
clover: Implement clGetExtensionFunctionAddressForPlatform.
Add clGetExtensionFunctionAddressForPlatform (CL 1.2).
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Vedran Miletić [Wed, 28 Sep 2016 14:18:24 +0000 (16:18 +0200)]
clover: Introduce CLOVER_EXTRA_*_OPTIONS environment variables
The options specified in the CLOVER_EXTRA_BUILD_OPTIONS shell
variable are appended to the options specified by the OpenCL program
in the clBuildProgram function call, if any.
Analogously, the options specified in the CLOVER_EXTRA_COMPILE_OPTIONS
and CLOVER_EXTRA_LINK_OPTIONS variables are appended to the options
specified in clCompileProgram and clLinkProgram function calls,
respectively.
v2:
* rename to CLOVER_EXTRA_COMPILER_OPTIONS
* use debug_get_option
* append to linker options as well
v3: code cleanups
v4: separate CLOVER_EXTRA_LINKER_OPTIONS options
v5:
* fix documentation typo
* use CLOVER_EXTRA_COMPILER_OPTIONS in link stage
v6:
* separate in CLOVER_EXTRA_{BUILD,COMPILE,LINK}_OPTIONS
* append options in cl{Build,Compile,Link}Program
Signed-off-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by[v1]: Edward O'Callaghan <funfunctor@folklore1984.net>
v7 [Francisco Jerez]: Slight simplification.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Vedran Miletić [Wed, 28 Sep 2016 15:11:43 +0000 (17:11 +0200)]
clover: Pass unquoted compiler arguments to Clang
OpenCL apps can quote arguments they pass to the OpenCL compiler, most
commonly include paths containing spaces.
If the Clang OpenCL compiler was called via a shell, the shell would
split the arguments with respect to to quotes and then remove quotes
before passing the arguments to the compiler. Since we call Clang as a
library, we have to split the argument with respect to quotes and then
remove quotes before passing the arguments.
v2: move to tokenize(), remove throwing of CL_INVALID_COMPILER_OPTIONS
v3: simplify parsing logic, use more C++11
v4: restore error throwing, clarify a comment
Signed-off-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jason Ekstrand [Fri, 28 Oct 2016 21:48:53 +0000 (14:48 -0700)]
i965/fs/generator: Don't use the address immediate for MOV_INDIRECT
The address immediate field is only 9 bits and, since the value is in
bytes, the highest GRF we can point to with it is g15. This makes it
pretty close to useless for MOV_INDIRECT. There were already piles of
restrictions preventing us from using it prior to Broadwell, so let's get
rid of the gen8+ code path entirely.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97779
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Marek Olšák [Tue, 25 Oct 2016 23:08:15 +0000 (01:08 +0200)]
radeonsi: fix behavior of GLSL findLSB(0)
12.0 and older need the same fix but elsewhere.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 25 Oct 2016 19:47:52 +0000 (21:47 +0200)]
radeonsi: set VGT_GS_ONCHIP_CNTL on CIK and later
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Fri, 28 Oct 2016 21:47:20 +0000 (14:47 -0700)]
i965: Fix make check after
66fcfa6894ab6
Commit
66fcfa6894ab6 changed the vec4 version of offset() to have 3
parameters instead of 2 but the vec4_cmod_propagation test was never
updated.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 28 Oct 2016 03:12:56 +0000 (20:12 -0700)]
glsl: Improve accuracy of alpha scaling in advanced blend lowering.
When blending with GL_COLORBURN_KHR and these colors:
dst = <0.
372549027, 0.
372549027, 0.
372549027, 0.
372549027>
src = <0.09375, 0.046875, 0.0, 0.375>
the normalized dst value became 0.
99999994 (due to precision problems
in the floating point divide of rgb by alpha). This caused the color
burn equation to fail the dst >= 1.0 comparison. The blue channel would
then fall through to the dst < 1.0 && src >= 0 comparison, which was
true, since src.b == 0. This produced a factor of 0.0 instead of 1.0.
This is an inherent numerical instability in the color burn and dodge
equations - depending on the precision of alpha scaling, the value can
be either 0.0 or 1.0. Technically, GLSL floating point division doesn't
even guarantee that 0.
372549027 / 0.
372549027 = 1.0. So arguably, the
CTS should allow either value. I've filed a bug at Khronos for further
discussion (linked below).
In the meantime, this patch improves the precision of alpha scaling by
replacing the division with (rgb == alpha ? 1.0 : rgb / alpha). We may
not need this long term, but for now, it fixes the following CTS tests:
ES31-CTS.blend_equation_advanced.blend_specific.GL_COLORBURN_KHR
ES31-CTS.blend_equation_advanced.blend_all.GL_COLORBURN_KHR_all_qualifier
Cc: currojerez@riseup.net
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16042
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Brian Paul [Wed, 26 Oct 2016 16:33:49 +0000 (09:33 -0700)]
mesa: rename gl_client_array -> gl_vertex_array
The term "client array" is a legacy thing dating back to the pre-VBO
era when _all_ vertex arrays lived in client memory.
Nowadays, it only contains vertex array state which is derived from
gl_array_attributes and gl_vertex_buffer_binding. It's used by the
VBO module and some drivers.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Thu, 20 Oct 2016 00:21:13 +0000 (18:21 -0600)]
mesa: code clean-up in _mesa_update_vao_client_arrays()
Init vars where declared, use const qualifiers.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Thu, 20 Oct 2016 00:00:18 +0000 (18:00 -0600)]
mesa: update comment on vertex_attrib_binding()
Was missed in an earlier renaming patch.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Wed, 19 Oct 2016 23:58:44 +0000 (17:58 -0600)]
mesa: rename gl_vertex_array_object::VertexBinding to BufferBinding
To be a little more understandable.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Eduardo Lima Mitev [Fri, 28 Oct 2016 12:45:36 +0000 (14:45 +0200)]
vulkan/wsi/x11: Smplify implementation of vkGetPhysicalDeviceSurfaceFormatsKHR
This patch simplifies x11_surface_get_formats(). It is actually just a
readability improvement over the patch I provided earlier this week
(
750d8cad72).
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Eduardo Lima Mitev [Fri, 28 Oct 2016 12:34:39 +0000 (14:34 +0200)]
vulkan/wsi/x11: Fix behavior of vkGetPhysicalDeviceSurfacePresentModesKHR
x11_surface_get_present_modes() is currently asserting that the number of
elements in pPresentModeCount must be greater than or equal to the number
of present modes available. This is buggy because pPresentModeCount
elements are later copied from the internal modes' array, so if
pPresentModeCount is greater, it will overflow it.
On top of that, this assertion violates the spec. From the Vulkan 1.0
(revision 32, with KHR extensions), page 581 of the PDF:
"If the value of pPresentModeCount is less than the number of
presentation modes supported, at most pPresentModeCount values will be
written. If pPresentModeCount is smaller than the number of
presentation modes supported for the given surface, VK_INCOMPLETE
will be returned instead of VK_SUCCESS to indicate that not all the
available values were returned."
So, the correct behavior is: if pPresentModeCount is greater than the
internal number of formats, it is clamped to that many present modes. But
if it is lesser than that, then pPresentModeCount elements are copied,
and the call returns VK_INCOMPLETE.
This fix is similar (but simpler and more readable) than the one I provided
in
750d8cad72a for vkGetPhysicalDeviceSurfaceFormatsKHR, which was suffering
from the same problem.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Timothy Arceri [Fri, 28 Oct 2016 06:27:36 +0000 (17:27 +1100)]
i965: use memory context when creating passthrough tcs
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Timothy Arceri [Fri, 28 Oct 2016 05:27:49 +0000 (16:27 +1100)]
intel/blorp: remove stale comment
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eduardo Lima Mitev [Tue, 18 Oct 2016 07:55:38 +0000 (09:55 +0200)]
drivers/meta: Accept GL_TEXTURE_3D as target for tex image decompression
An assert is currently raised, preventing decompression of a texture image into
a GL_TEXTURE_3D target. I have not found any spec wording that would explain
this, or implementation detail that would prevent it. And in any case, the
driver should not cause a crash upon user input arguments.
Fixes most failing subcases in CTS tests:
* GL44-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore
* GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore
These tests were crashing the driver before. Now they just fail, but due
to an unrelated issue affecting 2 out of the 45 test subcases.
No regressions observed against piglit or CTS-GL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>