radv: drop some unused cmask info members.

These were assigned but never used.

Inspired by similiar patch in radeonsi.

Signed-off-by: Dave Airlie <airlied@redhat.com>

intel: aubinator: fix printing missing gen option

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

intel: aubinator: fix assumptions on amount of required data

We require 12 bytes of headers but in some cases we just need 4.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

intel: aubinator: don't print out blocks twice

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Move gen8_disable_stages to brw_upload_initial_gpu_state

3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
HZ op, so repeatedly clearing it after every blorp execution is
redundant.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_state

This packet is non-pipelined and doesn't ever change across emissions.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

st/omx/dec: disable tunnel for size different case

When the video coded size is different from frame size, we need the result
buffers are same as coded size, which are not size compatible with encode
required size, so that simply use no tunnel for this case instead of frame
by frame converting.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>

st/omx/dec: result buffers size should match codec decoder size

Otherwise fails the check of matching between decoder size and buffers
size in kernel.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>

swr: [rasterizer] added EventHandlerFile contructor

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr: [rasterizer core] Frontend dependency work

Add frontend dependency concept in the DRAW_CONTEXT, which
allows serialization of frontend work if necessary.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr: [rasterizer core] Refactor/cleanup backends

Used for common code reuse and simplification

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr: [rasterizer core] Remove deprecated simd intrinsics

Used in abandoned all-or-nothing approach to converting to AVX512

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr: [rasterizer archrast] Add thread tags to event files.

This allows the post-processor to easily detect the API thread and to
process frame information. The frame information is needed to
optimized how data is processed from worker threads.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

glsl: use a non-malloc'd storage for short ir_variable names

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator in opt_constant_propagation

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator in opt_copy_propagation

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator in opt_copy_propagation_elements

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator in opt_dead_code_local

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator in glsl_symbol_table

no ralloc_free occurences

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: use the linear allocator for ast_node and derived classes

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl/lexer: use the linear allocator

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glcpp: use the linear allocator for most objects

v2: cosmetic changes

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)

ralloc: add a linear allocator as a child node of ralloc

v2: remove goto, cosmetic changes

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ralloc: remove memset from ralloc_size

only do it in rzalloc_size as it was supposed to be

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>

ralloc: use rzalloc where it's necessary

No change in behavior. ralloc_size is equivalent to rzalloc_size.
That will change though.

Calls not switched to rzalloc_size:
- ralloc_vasprintf
- glsl_type::name allocation (it's filled with snprintf)
- C++ classes where valgrind didn't show uninitialized values

I switched most of non-glsl stuff to rzalloc without checking whether
it's really needed.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ralloc: add DECLARE_RZALLOC_CXX_OPERATORS

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>

nir: zero allocated memory where needed

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

i965/fs: fill allocated memory with zeros where needed

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

i965/vec4: zero allocated memory where needed

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

glsl/glcpp: initialize all fields of glcpp_parser_t on creation

this fixes some of the regressions with
"ralloc: remove memset from ralloc_size"

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

glsl: Fix reading of uninitialized memory

Switch to use memory allocations which zero memory for places
where needed.

v2: modify and rebase on top of Marek's series (Tapani)

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

glsl: initialize glsl_struct_field properly

don't rely on ralloc doing memset

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>

ralloc: don't memset ralloc_header, clear it manually

time GALLIUM_NOOP=1 ./run shaders/private/alien_isolation/ >/dev/null

Before (2 takes):

real    0m8.734s    0m8.773s
user    0m34.232s   0m34.348s
sys     0m0.084s    0m0.056s

After (2 takes):

real    0m8.448s    0m8.463s
user    0m33.104s   0m33.160s
sys     0m0.088s    0m0.076s

Average change in "real" time spent: -3.4%

calloc should only do 2 things compared to malloc:
- check for overflow of "n * size"
- call memset
I'm not sure if that explains the difference.

v2: clear "parent" and "next" in the caller of add_child.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)

clover: Implement clGetExtensionFunctionAddressForPlatform.

Add clGetExtensionFunctionAddressForPlatform (CL 1.2).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

clover: Introduce CLOVER_EXTRA_*_OPTIONS environment variables

The options specified in the CLOVER_EXTRA_BUILD_OPTIONS shell
variable are appended to the options specified by the OpenCL program
in the clBuildProgram function call, if any.
Analogously, the options specified in the CLOVER_EXTRA_COMPILE_OPTIONS
and CLOVER_EXTRA_LINK_OPTIONS variables are appended to the options
specified in clCompileProgram and clLinkProgram function calls,
respectively.

v2:
 * rename to CLOVER_EXTRA_COMPILER_OPTIONS
 * use debug_get_option
 * append to linker options as well

v3: code cleanups

v4: separate CLOVER_EXTRA_LINKER_OPTIONS options

v5:
 * fix documentation typo
 * use CLOVER_EXTRA_COMPILER_OPTIONS in link stage

v6:
 * separate in CLOVER_EXTRA_{BUILD,COMPILE,LINK}_OPTIONS
 * append options in cl{Build,Compile,Link}Program

Signed-off-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by[v1]: Edward O'Callaghan <funfunctor@folklore1984.net>

v7 [Francisco Jerez]: Slight simplification.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

clover: Pass unquoted compiler arguments to Clang

OpenCL apps can quote arguments they pass to the OpenCL compiler, most
commonly include paths containing spaces.

If the Clang OpenCL compiler was called via a shell, the shell would
split the arguments with respect to to quotes and then remove quotes
before passing the arguments to the compiler. Since we call Clang as a
library, we have to split the argument with respect to quotes and then
remove quotes before passing the arguments.

v2: move to tokenize(), remove throwing of CL_INVALID_COMPILER_OPTIONS

v3: simplify parsing logic, use more C++11

v4: restore error throwing, clarify a comment

Signed-off-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/fs/generator: Don't use the address immediate for MOV_INDIRECT

The address immediate field is only 9 bits and, since the value is in
bytes, the highest GRF we can point to with it is g15.  This makes it
pretty close to useless for MOV_INDIRECT.  There were already piles of
restrictions preventing us from using it prior to Broadwell, so let's get
rid of the gen8+ code path entirely.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97779
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

radeonsi: fix behavior of GLSL findLSB(0)

12.0 and older need the same fix but elsewhere.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: set VGT_GS_ONCHIP_CNTL on CIK and later

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>

i965: Fix make check after 66fcfa6894ab6

Commit 66fcfa6894ab6 changed the vec4 version of offset() to have 3
parameters instead of 2 but the vec4_cmod_propagation test was never
updated.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: Improve accuracy of alpha scaling in advanced blend lowering.

When blending with GL_COLORBURN_KHR and these colors:

   dst = <0.372549027, 0.372549027, 0.372549027, 0.372549027>
   src = <0.09375, 0.046875, 0.0, 0.375>

the normalized dst value became 0.99999994 (due to precision problems
in the floating point divide of rgb by alpha).  This caused the color
burn equation to fail the dst >= 1.0 comparison.  The blue channel would
then fall through to the dst < 1.0 && src >= 0 comparison, which was
true, since src.b == 0.  This produced a factor of 0.0 instead of 1.0.

This is an inherent numerical instability in the color burn and dodge
equations - depending on the precision of alpha scaling, the value can
be either 0.0 or 1.0.  Technically, GLSL floating point division doesn't
even guarantee that 0.372549027 / 0.372549027 = 1.0.  So arguably, the
CTS should allow either value.  I've filed a bug at Khronos for further
discussion (linked below).

In the meantime, this patch improves the precision of alpha scaling by
replacing the division with (rgb == alpha ? 1.0 : rgb / alpha).  We may
not need this long term, but for now, it fixes the following CTS tests:

ES31-CTS.blend_equation_advanced.blend_specific.GL_COLORBURN_KHR
ES31-CTS.blend_equation_advanced.blend_all.GL_COLORBURN_KHR_all_qualifier

Cc: currojerez@riseup.net
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16042
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

mesa: rename gl_client_array -> gl_vertex_array

The term "client array" is a legacy thing dating back to the pre-VBO
era when _all_ vertex arrays lived in client memory.

Nowadays, it only contains vertex array state which is derived from
gl_array_attributes and gl_vertex_buffer_binding.  It's used by the
VBO module and some drivers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: code clean-up in _mesa_update_vao_client_arrays()

Init vars where declared, use const qualifiers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: update comment on vertex_attrib_binding()

Was missed in an earlier renaming patch.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: rename gl_vertex_array_object::VertexBinding to BufferBinding

To be a little more understandable.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

vulkan/wsi/x11: Smplify implementation of vkGetPhysicalDeviceSurfaceFormatsKHR

This patch simplifies x11_surface_get_formats(). It is actually just a
readability improvement over the patch I provided earlier this week
(750d8cad72).

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

vulkan/wsi/x11: Fix behavior of vkGetPhysicalDeviceSurfacePresentModesKHR

x11_surface_get_present_modes() is currently asserting that the number of
elements in pPresentModeCount must be greater than or equal to the number
of present modes available. This is buggy because pPresentModeCount
elements are later copied from the internal modes' array, so if
pPresentModeCount is greater, it will overflow it.

On top of that, this assertion violates the spec. From the Vulkan 1.0
(revision 32, with KHR extensions), page 581 of the PDF:

    "If the value of pPresentModeCount is less than the number of
     presentation modes supported, at most pPresentModeCount values will be
     written. If pPresentModeCount is smaller than the number of
     presentation modes supported for the given surface, VK_INCOMPLETE
     will be returned instead of VK_SUCCESS to indicate that not all the
     available values were returned."

So, the correct behavior is: if pPresentModeCount is greater than the
internal number of formats, it is clamped to that many present modes. But
if it is lesser than that, then pPresentModeCount elements are copied,
and the call returns VK_INCOMPLETE.

This fix is similar (but simpler and more readable) than the one I provided
in 750d8cad72a for vkGetPhysicalDeviceSurfaceFormatsKHR, which was suffering
from the same problem.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

i965: use memory context when creating passthrough tcs

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/blorp: remove stale comment

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

drivers/meta: Accept GL_TEXTURE_3D as target for tex image decompression

An assert is currently raised, preventing decompression of a texture image into
a GL_TEXTURE_3D target. I have not found any spec wording that would explain
this, or implementation detail that would prevent it. And in any case, the
driver should not cause a crash upon user input arguments.

Fixes most failing subcases in CTS tests:
* GL44-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore
* GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore

These tests were crashing the driver before. Now they just fail, but due
to an unrelated issue affecting 2 out of the 45 test subcases.

No regressions observed against piglit or CTS-GL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/blorp: Rework our usage of ralloc when compiling shaders

Previously, we were creating the shader with a NULL ralloc context and then
trusting in blorp_compile_fs to clean it up.  The only problem was that
blorp_compile_fs didn't clean up its context properly so we were leaking.
When I went to fix that, I realized that it couldn't because it has to
return the shader binary which is allocated off of that context and used by
the caller.  The solution is to make blorp_compile_fs take a ralloc
context, allocate the nir_shaders directly off that context, and clean it
all up in whatever function creates the shader and calls blorp_compile_fs.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "12.0, 13.0" <mesa-stable@lists.freedesktop.org>

intel/blorp: Rename compile_nir_shader to compile_fs

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

radv: split the device local memory heap into two

Advertise two device local memory heaps; one that is host visible
and one that is not.

This makes it possible for clients to tell how much host visible
vs. non-host visible memory is available.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: add a write-combining host-local memory type

Add the new memory type between the two device-local types. This makes
the list of supported memory types look like this:

1) DEVICE_LOCAL |              |               |
2)              | HOST_VISIBLE | HOST_COHERENT |
3) DEVICE_LOCAL | HOST_VISIBLE | HOST_COHERENT |
4)              | HOST_VISIBLE | HOST_COHERENT | HOST_CACHED

With this order a client that searches for a HOST_VISIBLE and
HOST_COHERENT memory type using the algorithm described in section
10.2 of the Vulkan specification (revision 32) will find the host-
local memory type first.

A client that requires the memory type to be HOST_VISIBLE and
HOST_COHERENT, but not DEVICE_LOCAL is most likely searching for
a memory type suitable for staging buffers / images.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965/miptree: Remove the width/height < 32768 restrictions

These restrictions existed because intel_miptree_blit couldn't handle
surfaces bigger than 32k.  How that we're chopping blits up into chunks, it
can handle any size we throw at it so we can get rid of this restriction.
This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Break blits into chunks in intel_miptree_blit

This allows us to blit much larger images than if we use the blitter
directly.  In particular, it gives us an almost infinite image height
compared to the fairly limiting 32k.  We do, however, still have a
restriction on stride of the image because handling larger strides, while
possible, is fairly difficult.

v2: Properly handle linear blit alignment restrictions

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Break blits into chunks in set_alpha_to_one

v2: Properly handle linear blit alignment restrictions

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Remove a bogus assertion

This assertion, while valid for linear buffers, doesn't work properly for
tiled memory.  It used to work most of the time because the offset provided
was always to the left-hand edge of the image.  However, if you use a byte
offset to get to the inside of the image, the height * stride calculation
may actually end up being too large.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/miptree: Break miptree -> ISL tiling conversion into a helper

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offset

The only actual user of this parameter was blorp and, since the conversion
to ISL, it no longer uses this function.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

intel/blorp: Fix a couple asserts around image copy rectangles

With dealing with rectangles in compressed images, you can have a width or
height that isn't a multiple of the corresponding compression block
dimension but only if that edge of your rectangle is on the edge of the
image.  When we call convert_to_single_slice, it creates an 2-D image and a
set of tile offsets into that image.  When detecting the right-edge and
bottom-edge cases, we weren't including the tile offsets so the assert
would misfire.  This caused crashes in a few UE4 demos

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98431
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Tested-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

anv/allocator: Assert that we have a valid gem handle in bo_pool_alloc

nvc0/ir: fix emission of IMAD with NEG modifiers

The emitter tried to emit sub instead of subr when src0 has
actually a NEG modifier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 12.0 13.0" <mesa-stable@lists.freedesktop.org>

glsl: inspect interfaces in contains_foo()

When checking if a type contains doubles, integers, samples, etc. we
check if the current type is a record or array, but not if it is an
interface.

This commit also inspects if the type is an interface.

It fixes spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/invalid-block-with-double.vert
piglit test.

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

i965/vec4: make offset() work in terms of a simd width and scalar components

So that it has the same semantics as the scalar backend implementation. The
helper will now take a simd width (which is always 8 in vec4 mode) and step
as many scalar components as specified by that width, respecting the size of
the scalar channels.

v2 (Curro):
  - Remove the assertion in offset(), byte_offset() has the same checks.
  - Use byte_offset() directly instead of add_byte_offset().
  - Make things more clear by explicitly including the vertical stride
    in the byte offset expression.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/vec4: use byte_offset() instead of offset()

In a later patch we want to change the semantics of offset() to be in terms
of SIMD width and scalar channels so it is consistent with the definition
of the same helper in the scalar backend. However, some uses of offset()
in the vec4 backend do not operate naturally in terms of these
semantics. In these cases it is more natural to use the byte_offset() helper
instead.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/vec4: add a byte_offset helper

v2: wrap the helper in a namespace to make clear that it is an
    implementation detail of byte_offset() and is not intended
    to be used independently (Curro).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

glsl: Size TCS->TES unsized arrays to gl_MaxPatchVertices for queries.

SSO validation and other program interface queries want to see that
unsized (non-patch) TCS output/TES input arrays are implicitly sized
to gl_MaxPatchVertices.

By the time we create the program resource lists, we've sized the arrays
to their actual size.  (We try to create TCS output arrays to match the
output patch size right away, and at this point, we should have shrunk
TES input arrays.)  One option would be to keep them sized to
gl_MaxPatchVertices, and defer shrinking them.  But that's a big change,
and I don't think it's a good idea.

Instead, this patch introduces a new ir_variable flag which indicates
the variable is implicitly to gl_MaxPatchVertices.  Then, the linker
munges the types when creating the resource list, ignoring the size
in the IR's types.  Basically, lie about it for resource queries.
It's ugly, but I think it ought to work.

We probably could use var->data.implicit_sized_array for this, but
I opted for a separate bit to try and avoid convoluting the existing
SSBO handling.  They're similar in concept, but share none of the
same code...

Fixes:
ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
and the ES32-CTS and ESEXT-CTS variants.

v2: Add a comment (requested by Timothy, written by me).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl: Pass ctx to program interface query helper functions.

The next commit will use this in add_shader_variable - this just
separates out some of the mechanical changes for easier review.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

egl: set preserved behavior for surface only if config supports it

Otherwise we can end up with mismatching behavior between config and
surface when client queries surface attributes. As example, configs
for DRI3 do not support preserved behavior but here we were setting
preserved behavior for pixmap and pbuffer.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98326
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>

mesa: expose GL_EXT_robustness

Fixes 8 failing dEQP tests:
   dEQP-EGL.functional.create_context_ext.robust_gles*

(now 42 tests pass in dEQP-EGL*robust*, 0 fail and rest are skipped)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98343
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

st/mesa: set RobustAccess true when is supported

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

i956: set RobustAccess true when is supported

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

mesa: add missing CONTEXT_ROBUST_ACCESS enum

commit 85008db1d51f923113832394d7f8d6b1868be882 missed this enum
for GL_KHR_robustness implementation

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: fix error handling in _eglCreateSync

EGL specification requires context to be current only when sync
type matches EGL_SYNC_FENCE_KHR.

Fixes 25 failing dEQP tests:
   dEQP-EGL.functional.reusable_sync.*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98339
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

vulkan/wsi/x11: add support for IMMEDIATE present mode

We shouldn't be using ASYNC here, that would be used
for immediate mode, so let's implement that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vulkan/wsi: store present mode in swapchain base class

This just moves this up a level as x11 will need it to
implement things properly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vulkan/wsi/x11: handle timeouts properly in next image acquire (v1.1)

For 0 timeout, just poll for an event, and if none, return
For UINT64_MAX timeout, just wait for special event blocked
For other timeouts get the xcb fd and block on it, decreasing
the timeout if we get woken up for non-special events.

v1.1: return VK_TIMEOUT for poll timeouts.
handle timeout going negative.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ac/llvm: trim texture return values

The intrinsic engine asserts in llvm due to this,
as we put a vec4 into a vec1, and the next instruction
isn't expecting it.

So trim the vector at the end before inserting it.

Reported-by: Christoph Haag <haagch+mesadev@frickel.club>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: Add pthread libs to cache_test

Fixes the following compile error, present when the SHA1 library is libgcrypt:

  CCLD     glsl/tests/cache-test
glsl/.libs/libglsl.a(libmesautil_la-mesa-sha1.o): In function `call_once':
/mesa/src/util/../../include/c11/threads_posix.h:96: undefined reference to `pthread_once'

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

genxml: Handle failure of Python codegen scripts.

nvc0/ir: fix emission of SHLADD with NEG modifiers

This affects GF100:GK110 chipsets, but not GM107+ where the
logic is a bit different. The emitters tried to emit sub
instead of subr when src0 has a NEG modifier.

This fixes the following piglit tests glsl-fs-loop-nested
and glsl-vs-loop-nested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>

compiler: avoid warning about redefinition of PYTHON_GEN

PYTHON_GEN is defined to the exact same thing in both
Makefile.glsl.am and Makefile.nir.am. This makes automake complain,
so let's lift the definition up to Makefile.am, the same way as
MKDIR_GEN.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl/dri2: swap_buffers_with_damage falls back to swap_buffers

Since commit 0a606a400fe3 ("egl: add eglSwapBuffersWithDamageKHR"),
Android has been broken because the function eglSwapBuffersWithDamageKHR
is provided regardless of the extension being present. Also, the Android
meta-EGL always advertises the extension regardless of the underlying
EGL implementation. As there doesn't seem to be a simple way
conditionally make the EGL function ptr NULL, just implement a brain
dead version of eglSwapBuffersWithDamage{KHR,EXT}.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
CC: Rob Clark <robdclark@gmail.com>
Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
[Emil Velikov: copy the original commit message from Rob's patch]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

compiler: automake: add shader_info.h to the sources list

Otherwise it'll be missing from the tarball.

Fixes: 094fe3a9591 ("nir: move nir_shader_info to a common compiler header")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

configure.ac: simplify EGL requirements for drivers dependent on EGL

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: allow multiple concurrent waiters in ClientWaitSync

so->fence can be unreferenced by one thread while another thread is
somewhere in ClientWaitSync and expecting so->fence to be non-NULL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98172

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: unduplicate st_check_sync code

It's the same as st_client_wait_sync. Discovered by Michel.
This is needed to make the following fix simpler.

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove si_resource_create_custom

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: stop using PIPE_BIND_CUSTOM

it has no effect whatsoever

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: remove a redundant buffer_create helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove unused r600_cmask_info members

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: don't force the same tiling parameters for FMASK

GCN can use a completely different tile mode for FMASK.

FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: allocate FMASK properly

I expect no change in behavior, because r600_texture.c forces the same
tile mode as the base texture has.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: print tiling index when printing texture info

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: don't do (fmask.size && cmask.size)

fmask implies that cmask is present too.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: re-order radeon_surf::dcc and htile members

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignment

these names were misleading.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove flags specific to libdrm_radeon from winsys interface

These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove r600_htile_info

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>