| 2020-06-22 |
Luke Kenneth Casson... | add TestMemoryPortInterface class which is designed...
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | comments for LDST CompUnit test
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | enable byte-reverse in CompLDSTUnit test
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | remove CompLDSTOpSubset, replace with just data_len.
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | move BE/LE byte-reverse into LDSTCompUnit
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | expand Memory width to 64 and granularity to 16 in...
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | add asserts to check data output is correct
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | add test_sram_wishbone.py
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | whitespace update
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | move trunc_div and trunc_rem to nmutil
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add comments on trunc_div and trunc_rem
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add divide-by-zero test to test_div_sim.py
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add docstring comment for SelectableInt
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add test_0_moduw and correct name to trunc_rem
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add abs SelectableInt unit test (very quick)
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add SelectableInt.abs
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add another bad hack in parser.py which identifies...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add in really bad hack which calls trunc_div or trunc_mod
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add trunc_div and trunch_rem to decoder helpers
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | auto-assign needs to use concat / selectconcat
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | whoops detected page name wrong, for special case fixedshift
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | bit of a mess. getting carry recognised and output...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add auto-assign mode detecting uninitialised variable...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | div needs to be floordiv
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add true and floor div to SelectableInt
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add simulator test for divw
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | do mix-in for test_sim.py so that jacob can write some...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add TODO comments to upgrade L0CacheBuffer to a new...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | parameterise LoadStoreUnitInterface to be expandable
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | enable general test cases in test_issuer
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | got loop example operational by noting when PC fastreg...
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | use different way to pass instructions to test_issuer...
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | debugging test_issuer.py general test cases
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | get instructions immediately from assembly code
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | move test_sim.py unit tests to different class (split)
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | slightly hacky way to keep an eye on the PC
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | whoops generate core ilang not TestIssuer
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | use while / exception in test_compunit loop
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | investigating mtocrf/mtcrf issue
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add bug reference to mtocrf/mtcrf name decoding
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | decoding assembly instruction name, move to separate...
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | getting sim instruction decoder to reproduce asm instruction...
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add comment/assembly decode in power enums
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | update test_sim.py to do a simple execution loop: decode...
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add loop example, required a bit of munging.
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | get fu compunit test to use ISACaller instruction-memory
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | got fed up of adding arguments to ISACaller / ISA,...
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | split execute and setup of ISACaller instruction execution
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | comment ISACaller setup
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | start to add in independent execution into ISACaller
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add a fake program counter to ISACaller
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | use an independent power decoder in ISACaller
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add "respect_pc" boolean to ISACaller
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | add optional instruction memory
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | split out TestIssuer into separate module
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | remove unneeded yield
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | enable all tests again in test_core.py and test_issuer.py
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | got test_issuer FSM operating. bit of a hack
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | debugging test_issuer, getting FSM working
|
commit | commitdiff | tree |
| 2020-06-17 |
Luke Kenneth Casson... | output to issuer_simulator.vcd
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add first version unit test for TestIssuer
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | reduce instruction depth to 6 bits in TestIssuer
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move debug statements to check function
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | hack LD/ST ad/st together, allow PC to be set externally
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move check regs in simple core to separate function
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | move test core reg set up into separate function
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | set up a TestIssuer class with a FSM for doing instruction...
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add ports to TestMemory
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add beginnings of TestIssuer class, to issue instructions...
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | weird: adding TestMemory with no port causes nmigen...
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | refer to signals directly in Test Core
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | add test instruction memory SRAM
|
commit | commitdiff | tree |
| 2020-06-16 |
Luke Kenneth Casson... | update popcount docstring
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | start trying to fill in some comments in Minerva L1...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whitespace cleanup
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | imports and syntax errors fixed (found test_cache.py)
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | more whitespace
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | more whitespace on minerva (no unit tests, so cannot...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whitespace cleanup, remove minerva DataSelector class
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | have to set up addr/st rel-go link before setting up...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | add in memory setup/check but disable LDST Unit Tests...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | move setup/check memory into helper functions for use...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | whoops LDSTCompUnit was identified as a Function.ALU...
|
commit | commitdiff | tree |
| 2020-06-15 |
Luke Kenneth Casson... | add in TstL0CacheBuffer but disable temporarily
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add optional LDSTFunctionUnit to compunits
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | unit tests showing byte-reverse works
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add sim-qemu test for byte-reversed LD/ST
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add in byte-reverse from op PowerDecode2 field
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | error in address width (truncated) in setting up L0CacheBuffer
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | error in naming that ended up in gtkwave from a proxy
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add another LD/ST example to qemu-sim test,
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | add byte-reversal on LD and ST in L0CacheBuffer
|
commit | commitdiff | tree |
| 2020-06-14 |
Luke Kenneth Casson... | reasonably certain that the careful and slow use of...
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | first cut at qemu memory dump and compare
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | note possible BE/LE mode needed for memory reads/writes
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | update ld/st test to see what is going on
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | tracking down what looks like an error in the Simulator...
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | debug printout of sim and hardware memory, shows mismatch...
|
commit | commitdiff | tree |
| 2020-06-12 |
Luke Kenneth Casson... | use ALUHelpers in LDSTCompUnit test
|
commit | commitdiff | tree |
| next |
projects / soc.git / search