projects / soc.git / shortlog
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
soc.git
2021-11-19 Luke Kenneth... code tidyup / comments, and use defaultdict commit | commitdiff | tree
2021-11-19 Luke Kenneth... create lists of latches in each FU, to record the read... commit | commitdiff | tree
2021-11-19 Luke Kenneth... for some reason DMI CTRL returns status of 0x6 not 0x0 commit | commitdiff | tree
2021-11-19 Luke Kenneth... missing argument, domain="sync" in JTAG instance commit | commitdiff | tree
2021-11-19 Luke Kenneth... return None if data returned is empty commit | commitdiff | tree
2021-11-18 Luke Kenneth... remove combinatorial loop in core instruction conflict... commit | commitdiff | tree
2021-11-18 Luke Kenneth... experimenting with overlapping instructions, bit of... commit | commitdiff | tree
2021-11-18 Luke Kenneth... set up core processing FSM, which captures data if... commit | commitdiff | tree
2021-11-18 Luke Kenneth... set up a temporary copy of CoreInput commit | commitdiff | tree
2021-11-18 Luke Kenneth... experiment allowing overlap (activated with --allow... commit | commitdiff | tree
2021-11-18 Luke Kenneth... remove unneeded import commit | commitdiff | tree
2021-11-17 Jacob Lifshaystart adding bitmanip FU commit | commitdiff | tree
2021-11-17 Tobias PlatenPortInterfaceBase: fix fast exception handling commit | commitdiff | tree
2021-11-17 Tobias Platenwhitespace commit | commitdiff | tree
2021-11-17 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... commit | commitdiff | tree
2021-11-17 Tobias Platenfix mistake in test_pi2ls.py commit | commitdiff | tree
2021-11-17 Luke Kenneth... reading of regfile bitvector added, which activates... commit | commitdiff | tree
2021-11-17 Luke Kenneth... core hazard bitvector regfiles need to be readable commit | commitdiff | tree
2021-11-17 Tobias Platenfixed busy waiting in pi_st commit | commitdiff | tree
2021-11-17 Luke Kenneth... add option to test_issuer.py to allow for overlapping... commit | commitdiff | tree
2021-11-17 Luke Kenneth... add ability to run hazard instruction for test purposes commit | commitdiff | tree
2021-11-17 Luke Kenneth... detect the case in Core bitvector when the Function... commit | commitdiff | tree
2021-11-17 Luke Kenneth... add probe of whether CompUnit ALU is done or not. commit | commitdiff | tree
2021-11-17 Luke Kenneth... missing optional check on make_hazard_vecs commit | commitdiff | tree
2021-11-17 Luke Kenneth... move core hazard set/clear to separate function, for... commit | commitdiff | tree
2021-11-17 Luke Kenneth... whoops context-indentation by mistake (no harm done... commit | commitdiff | tree
2021-11-17 Luke Kenneth... add a FetchOutput pipeline data structure commit | commitdiff | tree
2021-11-16 Luke Kenneth... print out regfile unary status, bit of name-cleanup commit | commitdiff | tree
2021-11-16 Luke Kenneth... use a virtual regfile port for the hazard bitvectors commit | commitdiff | tree
2021-11-16 Tobias Platenpi_ld busy waiting fix commit | commitdiff | tree
2021-11-16 Tobias Platenloadstore1 now reports exception reason commit | commitdiff | tree
2021-11-16 Luke Kenneth... create set/get ports for bitvectors commit | commitdiff | tree
2021-11-16 Luke Kenneth... capture write port (wrflag) in byregfiles_spec for... commit | commitdiff | tree
2021-11-16 Luke Kenneth... rename regports for bitvectors so that commit | commitdiff | tree
2021-11-16 Luke Kenneth... starting to get write-clear of hazard vectors operating commit | commitdiff | tree
2021-11-16 Luke Kenneth... whoops, hazard vectors were depth 1 width N commit | commitdiff | tree
2021-11-15 Tobias Platenreport dar on exception + test case commit | commitdiff | tree
2021-11-15 Tobias Platenadd test_loadstore1.py commit | commitdiff | tree
2021-11-13 Luke Kenneth... add quick instructions on how to run pinouts.py to... commit | commitdiff | tree
2021-11-13 Luke Kenneth... update submodule to make ngi pointer router pinouts commit | commitdiff | tree
2021-11-13 Luke Kenneth... add new get_pinspec_resources function which creates... commit | commitdiff | tree
2021-11-13 Luke Kenneth... code-comment for get_pinspecs() commit | commitdiff | tree
2021-11-13 Luke Kenneth... start adding hazard vector setting in core (unfinished) commit | commitdiff | tree
2021-11-11 Luke Kenneth... debug prints commit | commitdiff | tree
2021-11-11 Luke Kenneth... fix regfile port names for "fast" port access (regreduc... commit | commitdiff | tree
2021-11-11 Luke Kenneth... TODO, implement is_dcbz commit | commitdiff | tree
2021-11-11 Luke Kenneth... code-comments commit | commitdiff | tree
2021-11-11 Luke Kenneth... split out core input/output into separate file core_data.py commit | commitdiff | tree
2021-11-11 Luke Kenneth... enable hazard vecs in core commit | commitdiff | tree
2021-11-11 Luke Kenneth... add exact same number - and name - bitvector ports... commit | commitdiff | tree
2021-11-11 Luke Kenneth... code-morph regfile port specs to a dictionary format... commit | commitdiff | tree
2021-11-11 Luke Kenneth... invert numbering on CR HDLState.get_crregs commit | commitdiff | tree
2021-11-10 Luke Kenneth... update store data reg 10 to 0xfe in virtmode mmu test commit | commitdiff | tree
2021-11-10 Luke Kenneth... remove read of MSR, it is done by passing through Power... commit | commitdiff | tree
2021-11-10 Luke Kenneth... allow MSR to be set in StateRegs in test_core.py commit | commitdiff | tree
2021-11-10 Luke Kenneth... add $Display of oper_r.msr in LDSTCompUnit commit | commitdiff | tree
2021-11-10 Luke Kenneth... whitespace commit | commitdiff | tree
2021-11-10 Luke Kenneth... morph regfiles to add hazard vector make_vecs function commit | commitdiff | tree
2021-11-10 Luke Kenneth... add fetch of MSR in LD/ST pipe_data commit | commitdiff | tree
2021-11-10 Tobias Platenadd debug output for msr_pr commit | commitdiff | tree
2021-11-10 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... commit | commitdiff | tree
2021-11-10 Tobias Platentest testcase for exception commit | commitdiff | tree
2021-11-10 Luke Kenneth... make core busy_o part of the CoreOutput data structure commit | commitdiff | tree
2021-11-10 Luke Kenneth... add a "fu_found" signal to core, which allows for an... commit | commitdiff | tree
2021-11-09 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... commit | commitdiff | tree
2021-11-09 Tobias Platentest_issuer_mmu.py: add case_5_allsprs commit | commitdiff | tree
2021-11-09 Luke Kenneth... add core instruction-issue PriorityPickers commit | commitdiff | tree
2021-11-09 Luke Kenneth... comments commit | commitdiff | tree
2021-11-09 Luke Kenneth... core.py: create a dictionary of lists of Function Units... commit | commitdiff | tree
2021-11-09 Luke Kenneth... create function core conect_satellite_decoders commit | commitdiff | tree
2021-11-09 Luke Kenneth... add cancel in to alu_ok / alu_valid in LDSTCompUnit commit | commitdiff | tree
2021-11-09 Luke Kenneth... rename LDSTCompUnit cancel to canceln (because it is... commit | commitdiff | tree
2021-11-09 Luke Kenneth... whoops must remember to do rdmaskn on LDSTCompUnit... commit | commitdiff | tree
2021-11-08 Luke Kenneth... remove unit test that is unfinished commit | commitdiff | tree
2021-11-08 Luke Kenneth... shorter way of getting FU busy signals commit | commitdiff | tree
2021-11-08 Luke Kenneth... MultiCompUnit fixed to not need rdmask to be sustained... commit | commitdiff | tree
2021-11-08 Luke Kenneth... in MultiCompUnit, put rdmaskn into src latch rather... commit | commitdiff | tree
2021-11-08 Tobias Platenmmu unit test working again commit | commitdiff | tree
2021-11-08 Luke Kenneth... remove unused variable commit | commitdiff | tree
2021-11-08 Luke Kenneth... code comments commit | commitdiff | tree
2021-11-08 Luke Kenneth... comments commit | commitdiff | tree
2021-11-08 Luke Kenneth... remove issue_i from core, use i_valid instead to decide... commit | commitdiff | tree
2021-11-08 Luke Kenneth... move "exception happened" detection from TestIssuer... commit | commitdiff | tree
2021-11-08 Luke Kenneth... use p.i_valid in core instead of explicit signal ivalid_i commit | commitdiff | tree
2021-11-08 Luke Kenneth... use Pipeline API o_ready instead of explicit core busy_... commit | commitdiff | tree
2021-11-08 Luke Kenneth... convert core.py to Pipeline API, deriving from ControlBase commit | commitdiff | tree
2021-11-08 Luke Kenneth... remove unneeded imports commit | commitdiff | tree
2021-11-08 Luke Kenneth... move simple core input and output data to in/out data... commit | commitdiff | tree
2021-11-07 Luke Kenneth... make FSMDivCoreStage properly conform to Stage API commit | commitdiff | tree
2021-11-07 Luke Kenneth... add hazard vectors to Regfiles commit | commitdiff | tree
2021-11-07 Luke Kenneth... add quick test of regfiles to output rtlil commit | commitdiff | tree
2021-11-07 Luke Kenneth... switch over to single-entry (num_rows=1) ReservationSta... commit | commitdiff | tree
2021-11-07 Luke Kenneth... for some reason mul test cases had not been added to... commit | commitdiff | tree
2021-11-07 Luke Kenneth... adding an FSM-based MultiCompUnit test (does not work... commit | commitdiff | tree
2021-11-07 Luke Kenneth... remove some of the uses of wrmask (redundant) commit | commitdiff | tree
2021-11-06 Tobias Platenupdate test_issuer_mmu.py testcase, add needed debug... commit | commitdiff | tree
2021-11-05 Tobias Platentlbie, mtspr and mfspr test cases commit | commitdiff | tree
2021-11-05 Tobias Platenadd mmu/dcache unit test commit | commitdiff | tree
2021-11-04 Luke Kenneth... use ReservationStations2 (disabled for now) commit | commitdiff | tree
2021-11-04 Luke Kenneth... write-ok is expected to stay valid *after* being set, commit | commitdiff | tree
next