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add rlwinm. test instruction (sets CR0)
[soc.git] / src / soc / fu / shift_rot / input_stage.py
2020-05-22 Luke Kenneth Casso... create common input pipe spec to avoid code-duplication blob | commitdiff | raw
2020-05-20 Luke Kenneth Casso... fixup XER names in shift_rot pipe tests blob | commitdiff | raw | diff to current
2020-05-18 Luke Kenneth Casso... mass-rename of modules to soc.fu.* blob | commitdiff | raw | diff to current
2020-05-18 Luke Kenneth Casso... rename pipe to fu blob | commitdiff | raw | diff to current