fix write-after-write hazard checking
[soc.git] / src /
2021-11-30 Luke Kenneth Casso... fix write-after-write hazard checking
2021-11-30 Luke Kenneth Casso... allow busy to settle before checking state in test_core.py
2021-11-30 Luke Kenneth Casso... only check regs right at the end in test_core.py overla...
2021-11-30 Luke Kenneth Casso... move sim call before core run in test_core.py
2021-11-30 Luke Kenneth Casso... getting formerly unused test_core.py operational
2021-11-29 Luke Kenneth Casso... whoops missed make_hazard_vec test
2021-11-29 Luke Kenneth Casso... whoops do the set/get of the write-vector at a single...
2021-11-29 Luke Kenneth Casso... always set fwd_bus_mode=False on regfiles
2021-11-29 Luke Kenneth Casso... add MMU and SPR to list of FUs that must report "busy...
2021-11-29 Luke Kenneth Casso... disallow overlap in core on LDST, Branch, and Trap.
2021-11-29 Luke Kenneth Casso... use dict style not setattr on submodules
2021-11-27 Luke Kenneth Casso... code-comments
2021-11-27 Luke Kenneth Casso... fix instructions of the type "read-reg-is-same-as-write"
2021-11-27 Tobias Platenloadstore testcase: read at random addresses
2021-11-27 Luke Kenneth Casso... FU-Regs matrix tidyup and comments
2021-11-27 Luke Kenneth Casso... minor tidyup on FU-Regs Matrix
2021-11-27 Luke Kenneth Casso... update FURegDepMatrix to multi-dest
2021-11-27 Luke Kenneth Casso... update naming on Reg_Rsv signals
2021-11-27 Luke Kenneth Casso... add copyright and attribution notices
2021-11-27 Luke Kenneth Casso... update FU_RW_Pending vectors to multi-dest
2021-11-27 Luke Kenneth Casso... convert DependencyRow to multiple destination latches
2021-11-27 Luke Kenneth Casso... add copyright and attribution notices to dependence_cell.py
2021-11-27 Luke Kenneth Casso... update license and attribution in fu_reg_matrix.py
2021-11-26 Luke Kenneth Casso... convert score6600_multi over to using RegSpecs (in...
2021-11-26 Luke Kenneth Casso... early use of Array unnecessarily (all uses are static...
2021-11-26 Luke Kenneth Casso... early use of Array unnecessarily (all uses are static...
2021-11-25 Luke Kenneth Casso... get score6600_multi operational again
2021-11-25 Luke Kenneth Casso... add debug prints in old simulator
2021-11-25 Luke Kenneth Casso... add debug prints in old simulator
2021-11-25 Tobias Platenseperate invalid test case from other test cases
2021-11-25 Tobias Platenmmu: add debug output
2021-11-25 Tobias Platenadd testcase for invalid pagetable
2021-11-25 Tobias Platenpimem: reset on exception
2021-11-25 Tobias Platenremove unuses dsisr signal
2021-11-25 Tobias Platenreset state to idle on exception
2021-11-25 Luke Kenneth Casso... more sorting scoremulti
2021-11-25 Luke Kenneth Casso... more sorting out scoremulti
2021-11-25 Luke Kenneth Casso... add test pspec for scoremulti to work
2021-11-24 Luke Kenneth Casso... convert hazard bitvectors to Reset-Priority SRLatch...
2021-11-24 Tobias Platenfix exception handling in pi_ld
2021-11-24 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-24 Tobias Platenimprove debug output in mmu.py
2021-11-24 Luke Kenneth Casso... fix write-after-write hazard detection
2021-11-24 Luke Kenneth Casso... when allow_overlap enabled do a manual wait until all...
2021-11-24 Luke Kenneth Casso... code-comments
2021-11-24 Luke Kenneth Casso... add write-after-write hazard detection
2021-11-24 Luke Kenneth Casso... add 2nd hazard bitvector port for write-after-write
2021-11-24 Luke Kenneth Casso... whoops merged the two write-ports for RT and RA-with...
2021-11-24 Luke Kenneth Casso... disable hazard vectors when overlap is not requested...
2021-11-23 Luke Kenneth Casso... more comments
2021-11-23 Tobias Platenpimem changes for st exception handling
2021-11-23 Tobias Platenfix test_loadstore1.py
2021-11-23 Luke Kenneth Casso... add FU write-after-write hazard detection Signal (dummy...
2021-11-23 Luke Kenneth Casso... add code-comments, link to in-order core
2021-11-23 Luke Kenneth Casso... more use of namedtuples in core.py for clarity
2021-11-23 Luke Kenneth Casso... start some use of namedtuples in core.py
2021-11-23 Luke Kenneth Casso... use some namedtuples to make things clearer in core.py
2021-11-23 Luke Kenneth Casso... use fascinating trick of defaultdict-of-defaultdicts
2021-11-22 Tobias Platenadd store testcase
2021-11-22 Tobias Platenfix fast exception handling for pi_st
2021-11-22 Luke Kenneth Casso... make FetchFSM take PC as an input in its ispec
2021-11-22 Luke Kenneth Casso... local variable rename in FetchFSM
2021-11-22 Luke Kenneth Casso... split out FetchFSM into separate module
2021-11-22 Luke Kenneth Casso... whoops accidentally committed commented-out test for...
2021-11-21 Luke Kenneth Casso... reset execute back to ISSUE_START if at INSN_WAIT and
2021-11-21 Luke Kenneth Casso... restrict (refine) hazard selection to the one being...
2021-11-21 Luke Kenneth Casso... block picker hazard on input to PriorityPicker rather...
2021-11-21 Luke Kenneth Casso... parse test_issuer args allow option "allow-overlap...
2021-11-21 Luke Kenneth Casso... complex. TestRunner now does not work properly unless...
2021-11-21 Luke Kenneth Casso... fixed issue with hazard dependencies, read will nott
2021-11-21 Tobias Platenadd testcase for fast exceptions on store
2021-11-20 Tobias Platenfix pi_ld testcase
2021-11-19 Luke Kenneth Casso... add both bitdict and selected args to connect_rd/wrport
2021-11-19 Luke Kenneth Casso... sorting out issue hazard conflicts in core.
2021-11-19 Luke Kenneth Casso... debug and cleanup
2021-11-19 Luke Kenneth Casso... rename instruction_active to instr_active in core
2021-11-19 Luke Kenneth Casso... read latch on regfile ports was fine, the combinatorial...
2021-11-19 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-19 Luke Kenneth Casso... latch copy of read register numbers, not in use due...
2021-11-19 Luke Kenneth Casso... use read spec in connect_rdport rather than list of...
2021-11-19 Luke Kenneth Casso... capture write regfile numbers into write latches in...
2021-11-19 Luke Kenneth Casso... code tidyup / comments, and use defaultdict
2021-11-19 Luke Kenneth Casso... create lists of latches in each FU, to record the read...
2021-11-19 Luke Kenneth Casso... for some reason DMI CTRL returns status of 0x6 not 0x0
2021-11-19 Luke Kenneth Casso... missing argument, domain="sync" in JTAG instance
2021-11-19 Luke Kenneth Casso... return None if data returned is empty
2021-11-18 Luke Kenneth Casso... remove combinatorial loop in core instruction conflict...
2021-11-18 Luke Kenneth Casso... experimenting with overlapping instructions, bit of...
2021-11-18 Luke Kenneth Casso... set up core processing FSM, which captures data if...
2021-11-18 Luke Kenneth Casso... set up a temporary copy of CoreInput
2021-11-18 Luke Kenneth Casso... experiment allowing overlap (activated with --allow...
2021-11-18 Luke Kenneth Casso... remove unneeded import
2021-11-18 Tobias Platenmore work on test_loadstore1
2021-11-17 Jacob Lifshaystart adding bitmanip FU
2021-11-17 Tobias PlatenPortInterfaceBase: fix fast exception handling
2021-11-17 Tobias Platenwhitespace
2021-11-17 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-11-17 Tobias Platenfix mistake in test_pi2ls.py
2021-11-17 Luke Kenneth Casso... reading of regfile bitvector added, which activates...
2021-11-17 Luke Kenneth Casso... core hazard bitvector regfiles need to be readable
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