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use rising edge detection on st go_i/rel_o
[soc.git] / src /
2020-08-09 Luke Kenneth Casso... use rising edge detection on st go_i/rel_o tree | commitdiff
2020-08-09 Luke Kenneth Casso... add logical test issuer case tree | commitdiff
2020-08-09 Luke Kenneth Casso... get rid of MSR read combinatorial loop tree | commitdiff
2020-08-09 Luke Kenneth Casso... delay go_st by one cycle, break combinatorial loop tree | commitdiff
2020-08-09 Luke Kenneth Casso... divwo case makes test_issuer stay busy! tree | commitdiff
2020-08-09 Luke Kenneth Casso... add extra divwo regression test tree | commitdiff
2020-08-09 Luke Kenneth Casso... compalu combinatorial loop detected tree | commitdiff
2020-08-08 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-08 Cole PoirierUpdate test case_mulli tree | commitdiff
2020-08-08 Tobias Platenaddr_split.py: shift bytes not bits tree | commitdiff
2020-08-07 Cole PoirierUpdate test case_mulli tree | commitdiff
2020-08-07 Cole PoirierUpdate test case_mulli, I think it now works correctly tree | commitdiff
2020-08-07 Cole PoirierUpdate mulli to try to use immediates not registers tree | commitdiff
2020-08-06 Cole PoirierFix mmu.py formatting tree | commitdiff
2020-08-06 Cole PoirierFix formatting tree | commitdiff
2020-08-06 Cole PoirierInitial commit of translation of microwatt mmu.vhdl... tree | commitdiff
2020-08-06 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-06 Cole PoirierUpdate test case_all_rb_close_to_ov tree | commitdiff
2020-08-06 Cole PoirierUpdate test case_all_rb_close_to_ov tree | commitdiff
2020-08-06 Luke Kenneth Casso... fix LDST PortInterface FSM interaction tree | commitdiff
2020-08-06 Luke Kenneth Casso... MULS on parameter b needed to check whether it was... tree | commitdiff
2020-08-06 Cole PoirierAdd special test for case_mulli, apply autopep8 tree | commitdiff
2020-08-05 Cole PoirierAdd test case_all_rb_close_to_ov tree | commitdiff
2020-08-05 Cole PoirierRemove mulli from instrs in test case_all*, add TODO... tree | commitdiff
2020-08-05 Cole PoirierAdd new test_values to tests case_all and case_all_rb_r... tree | commitdiff
2020-08-05 Cole PoirierAdd second case_all test where rb is randint tree | commitdiff
2020-08-05 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2020-08-05 Tobias Platenundo changes that fix unit test, but do not solve anything tree | commitdiff
2020-08-05 Luke Kenneth Casso... rename ibus/dbus (shorten) tree | commitdiff
2020-08-05 Luke Kenneth Casso... clear sel on loadstore tree | commitdiff
2020-08-05 Tobias Platenfix LDSTSplitter tree | commitdiff
2020-08-05 Cole PoirierRemove madd* isns, added madd* isns test TODO tree | commitdiff
2020-08-05 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-05 Luke Kenneth Casso... adding bus data width of 64 in litex sim doesnt work tree | commitdiff
2020-08-05 Luke Kenneth Casso... add div test cases into test_issuer.py tree | commitdiff
2020-08-05 Luke Kenneth Casso... add div FSM as default for test_issuer in verilog and... tree | commitdiff
2020-08-05 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-05 Jacob LifshayFixed div pipe with FSM tree | commitdiff
2020-08-05 Cole PoirierFix pysim deprecation warning tree | commitdiff
2020-08-05 Cole PoirierAdd case_all to MUL unit tests, remove duplicate test... tree | commitdiff
2020-08-04 Luke Kenneth Casso... read/set pc outside of FSM so that DMI interface can... tree | commitdiff
2020-08-04 Luke Kenneth Casso... swap over byte-reverse if/else in LDSTCompUnit tree | commitdiff
2020-08-04 Luke Kenneth Casso... tracked down byte-reversal in LDST ISACaller and LDSTCo... tree | commitdiff
2020-08-04 Luke Kenneth Casso... whitespace after autopep8 messed up tree | commitdiff
2020-08-04 Luke Kenneth Casso... msr and pc moved to "state" in PowerDecode2 tree | commitdiff
2020-08-04 Luke Kenneth Casso... whoops must output NIA not PC to debug DMI query in... tree | commitdiff
2020-08-04 Luke Kenneth Casso... allow instruction to run if initiated whilst "stopped... tree | commitdiff
2020-08-04 Luke Kenneth Casso... cycle through INT regs, read and debug in litex sim tree | commitdiff
2020-08-04 Luke Kenneth Casso... add DMI debug interface to libresoc litex sim tree | commitdiff
2020-08-04 Luke Kenneth Casso... single-step and print out PC using DMI in litex sim tree | commitdiff
2020-08-04 Luke Kenneth Casso... get litex sim to kick off a "STEP" via the DMI interfac... tree | commitdiff
2020-08-04 Luke Kenneth Casso... connect up a DMI FSM to litex sim tree | commitdiff
2020-08-04 Luke Kenneth Casso... more remove wildcard imports tree | commitdiff
2020-08-04 Luke Kenneth Casso... do not use wildcard imports tree | commitdiff
2020-08-04 Luke Kenneth Casso... adding litex sim experimentation. tree | commitdiff
2020-08-04 Samuel A. Falvo IIRemove XXX; this seems done otherwise. tree | commitdiff
2020-08-03 Luke Kenneth Casso... add quick demo/test of reading DMI reg 9 tree | commitdiff
2020-08-03 Luke Kenneth Casso... add extra port for debug read of int regs via DMI tree | commitdiff
2020-08-03 Luke Kenneth Casso... pass state (MSR/PC) around between PowerDecode2, DMI... tree | commitdiff
2020-08-03 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=446 tree | commitdiff
2020-08-03 Luke Kenneth Casso... use new soc.config.state CoreState class in DMI and... tree | commitdiff
2020-08-03 Tobias PlatenLDSTSplitter: report exception tree | commitdiff
2020-08-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2020-08-03 Tobias PlatenTstDataMerger2 tree | commitdiff
2020-08-03 Luke Kenneth Casso... change over to DMI debug start/stop interface tree | commitdiff
2020-08-03 Luke Kenneth Casso... move debug to record tree | commitdiff
2020-08-03 Samuel A. Falvo IIWIP: check MB > ME and select mask appropriately tree | commitdiff
2020-08-02 Luke Kenneth Casso... convert microwatt core_debug.vhdl to nmigen tree | commitdiff
2020-08-02 Luke Kenneth Casso... add debug dir tree | commitdiff
2020-08-01 Luke Kenneth Casso... add quick test of litex bios IMM64 macro tree | commitdiff
2020-08-01 Luke Kenneth Casso... add rlwnm test showing that shift rot OP_RLC proof... tree | commitdiff
2020-08-01 Luke Kenneth Casso... line-length / whitespace tree | commitdiff
2020-08-01 Luke Kenneth Casso... expand out for-loop setting up input record subset tree | commitdiff
2020-07-31 Luke Kenneth Casso... reorg DecodeB in power_decoder2.py to sign-extend immed... tree | commitdiff
2020-07-31 Luke Kenneth Casso... add more instructions to litex trampoline test (not... tree | commitdiff
2020-07-31 Luke Kenneth Casso... restrict external port list further in test_issuer tree | commitdiff
2020-07-31 Luke Kenneth Casso... missed go_i/rel_o rename tree | commitdiff
2020-07-31 Samuel A. Falvo IIWIP: more debugging signals for inspection tree | commitdiff
2020-07-30 Samuel A. Falvo IIWIP: rlwinm/rlwnm/rlwimi-type proofs tree | commitdiff
2020-07-30 Tobias Platenbegin work on TestCase for two DataMergers/Cache tree | commitdiff
2020-07-30 Tobias Platenadd CacheRecord tree | commitdiff
2020-07-30 Luke Kenneth Casso... core_start/stop/endian were inverted (output) tree | commitdiff
2020-07-30 Luke Kenneth Casso... ha! have to explicitly specify the ports when writing... tree | commitdiff
2020-07-30 Luke Kenneth Casso... add trampoline test from litex tree | commitdiff
2020-07-30 Luke Kenneth Casso... set sel line in minerva instruction fetch tree | commitdiff
2020-07-30 Luke Kenneth Casso... ha! found source of XICS test bug: wishbone stb was... tree | commitdiff
2020-07-29 Luke Kenneth Casso... more exploratory testing of XICS, joining ICP and ICS... tree | commitdiff
2020-07-29 Tobias Platenmodified LDSTSplitter to conform to PortInterface tree | commitdiff
2020-07-29 Luke Kenneth Casso... forgot to rename ad/st in LDSTCompUnitRecord tree | commitdiff
2020-07-29 Luke Kenneth Casso... bit of a big change: add prefixes "cu_" to all CompUnit... tree | commitdiff
2020-07-29 Luke Kenneth Casso... start on test joining XICS ICS to ICP tree | commitdiff
2020-07-29 Luke Kenneth Casso... tidyup XICS, identify (potential?) bug? tree | commitdiff
2020-07-29 Luke Kenneth Casso... move CR test out of subtest indentation tree | commitdiff
2020-07-29 Luke Kenneth Casso... move SHIFTROT test out of subtest indentation tree | commitdiff
2020-07-29 Luke Kenneth Casso... move actual ALU test out of subTest indentation just... tree | commitdiff
2020-07-29 Luke Kenneth Casso... whitespace tree | commitdiff
2020-07-29 Jacob Lifshayclean up branch test_pipe_caller tree | commitdiff
2020-07-29 Jacob Lifshayclean up alu test_pipe_caller tree | commitdiff
2020-07-29 Jacob Lifshayadd __init__.py to all source directories tree | commitdiff
2020-07-29 Jacob Lifshayclean up some tests tree | commitdiff
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