updated non_generated pinmap json file
[soclayout.git] / experiments9 / tsmc_c018 /
2021-06-10 Jean-Paul ChaputRebame root clock signal from "core.por_clk" into ...
2021-06-09 Luke Kenneth Casso... sys_clk renamed to sys_pllclk, iopads load from copy...
2021-06-09 Jean-Paul ChaputI/O pads reorganisation, 32 per side (except for NORTH).
2021-06-09 Jean-Paul ChaputP&R tweaks for routing convergence.
2021-06-09 Jean-Paul ChaputAdd a case in the build script to fit my environment...
2021-06-09 Jean-Paul ChaputRemove files that are now copied from other locations.
2021-06-08 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-08 Jean-Paul ChaputAdpapt e9/TSMC doDesign to the new size of the SRAMs...
2021-06-05 Luke Kenneth Casso... more comments
2021-06-05 Luke Kenneth Casso... comment about por_clk
2021-06-04 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-04 Jean-Paul ChaputUpdated configuration suited for experiment9/tsmc_c018.
2021-06-03 Luke Kenneth Casso... add 4ksram recon script in tsmc_c018 as well
2021-05-27 Luke Kenneth Casso... add TODO into tsmc_c018 coriolis2 settings.py
2021-05-26 Luke Kenneth Casso... appears to be missing libresoc from NETLISTS in Makefile
2021-04-30 Luke Kenneth Casso... using renamed (single) spblock_512w64b8w
2021-04-28 Luke Kenneth Casso... create function which pre-creates the blackbox cells
2021-04-28 Luke Kenneth Casso... name everything back to spblock_512w64b8w now that...
2021-04-28 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-04-28 Jean-Paul ChaputManagement of SRAMs block at Coriolis devel.
2021-04-27 Luke Kenneth Casso... also add blackboxes spblock512* etc.
2021-04-27 Luke Kenneth Casso... add copying over of spblock*.v and pll.v to build scripts
2021-04-24 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-04-24 Jean-Paul ChaputKeep in synch with the latest Coriolis. SRAM models...
2021-04-18 Luke Kenneth Casso... rename blackboxes to lowercase, spblock_512w64b8w, pll
2021-04-18 Luke Kenneth Casso... add yosys BLACKBOX SPBlock_512W64B8W - still blif2vst...
2021-04-18 Luke Kenneth Casso... must use VST_FLAGS uniquify uppercase
2021-04-18 Luke Kenneth Casso... sort out adding SPBlock_512 SRAM verilog to ls180
2021-04-18 Luke Kenneth Casso... update tsmc_018 4k build script
2021-04-12 Luke Kenneth Casso... update PLL signal output names
2021-04-09 Luke Kenneth Casso... whitespace
2021-04-09 Luke Kenneth Casso... whitespace cleanup
2021-03-29 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-03-29 Jean-Paul ChaputAdd a placeholder for the PLL in the doDesign.py for...
2021-03-23 Jean-Paul ChaputUodated doDesign for the latest ls180 (sram variant).
2021-03-14 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-03-14 Jean-Paul ChaputAdjusted doDesign.py scripts to use Chip.doChipFloorplan().
2021-03-09 Jean-Paul ChaputForgot the Makefile, stupid!
2021-03-09 Jean-Paul ChaputFirst working version of the Flexlib + P&R flow for...
2021-03-05 Jean-Paul ChaputAdded support files for ls180+SRAM on TSMC 180nm.