add copy of experiments4 to create memory example
[soclayout.git] / experiments9 /
2020-12-04 Luke Kenneth Casso... increase core size (again) to cope with DFFs currently...
2020-12-04 Luke Kenneth Casso... Revert "very weird bug where CoreToChip.buildChip canno...
2020-12-03 Luke Kenneth Casso... very weird bug where CoreToChip.buildChip cannot find...
2020-12-03 Luke Kenneth Casso... increase size to 45,000 to cope with 3x extra SRAMs
2020-12-03 Luke Kenneth Casso... experiment adding 3x extra SRAMs back in but still...
2020-12-03 Luke Kenneth Casso... wtf does 32/64 bit bus have to do with gpio_o(8) disapp...
2020-12-03 Luke Kenneth Casso... reduce mem width due to yosys bugs. sigh
2020-12-03 Luke Kenneth Casso... added 3 more 4k SRAMs
2020-12-02 Luke Kenneth Casso... increase size to 40,000
2020-12-02 Luke Kenneth Casso... begin random search for appropriate core size. start...
2020-12-02 Luke Kenneth Casso... add full core back in
2020-11-27 Luke Kenneth Casso... add comment do not use build.sh
2020-11-14 Luke Kenneth Casso... update ls180 litex interfaces
2020-11-14 Luke Kenneth Casso... get rid of ibus/dbus/xics advanced wishbone tags
2020-11-14 Luke Kenneth Casso... update litex direction of iopads in ls180
2020-11-13 Luke Kenneth Casso... corona-core gap too small
2020-11-13 Luke Kenneth Casso... increase core size yet again, shrink gap
2020-11-13 Luke Kenneth Casso... increase core size, reduce corona gap again
2020-11-13 Luke Kenneth Casso... reduce nc ls180 pins to match
2020-11-13 Luke Kenneth Casso... increase chip size by 100, make chipSize closer to...
2020-11-13 Luke Kenneth Casso... fix clk_sel width (2 not 3)
2020-11-13 Luke Kenneth Casso... trying to get yosys to stop destroying pll_lck_o signal
2020-11-13 Luke Kenneth Casso... trying to get yosys to stop destroying pll_lck_o signal
2020-11-13 Luke Kenneth Casso... update full core ls180 (actually with litex peripherals...
2020-11-13 Luke Kenneth Casso... test of litex peripherals back in (not full core)
2020-11-12 Luke Kenneth Casso... get core size big enough to fit pads along width
2020-11-12 Luke Kenneth Casso... remove niolib io_in/out signal, no longer needed
2020-11-11 Luke Kenneth Casso... adjust chip/core size to try to fit ls180 core/pads
2020-11-11 Luke Kenneth Casso... add power/ground pads
2020-11-11 Luke Kenneth Casso... update CLKSEL / PLLOCK pins for ls180
2020-11-09 Luke Kenneth Casso... add code comments for ioring-to-niolib conversion of...
2020-11-08 Luke Kenneth Casso... start conversion of ls180 to new niolib
2020-11-07 Luke Kenneth Casso... add io_in/io_out zero/one to help transition to new...
2020-11-07 Luke Kenneth Casso... messing about to get non_generated ls180.vst running...
2020-11-07 Luke Kenneth Casso... update full ls180 core
2020-11-05 Luke Kenneth Casso... update to "full" core
2020-11-05 Luke Kenneth Casso... add build scripts for ls180
2020-10-04 Luke Kenneth Casso... match up power/gnd numbers with pinmux
2020-10-04 Luke Kenneth Casso... use new extpower/intpower and pads.useCoreSize params
2020-10-04 Luke Kenneth Casso... reduce number of not-connected
2020-10-02 Luke Kenneth Casso... update build.sh
2020-10-02 Luke Kenneth Casso... add really cut down version of ls180.vst
2020-10-02 Luke Kenneth Casso... really really cut down core
2020-10-02 Luke Kenneth Casso... move ioring to pinmux
2020-10-01 Luke Kenneth Casso... update to new ls180.il (no core yet) with PLL I/O and I2C
2020-10-01 Luke Kenneth Casso... sort sys_* pad names
2020-10-01 Luke Kenneth Casso... add I2C, allow sys_clk_i and sys_pll_48_o out
2020-09-30 Luke Kenneth Casso... increase core.size to 27500x27500
2020-09-30 Luke Kenneth Casso... add full core ilang file
2020-09-30 Luke Kenneth Casso... commented-out core.size and chip.size which would allow the
2020-09-30 Luke Kenneth Casso... add build script for convenience
2020-09-29 Luke Kenneth Casso... add cki and ck to clock settings
2020-09-29 Luke Kenneth Casso... updated ls180 (no core, testing)
2020-09-28 Luke Kenneth Casso... add sdram_dm_1 back in
2020-09-28 Luke Kenneth Casso... iopad pads.instances mapping
2020-09-28 Luke Kenneth Casso... submodule update
2020-09-28 Luke Kenneth Casso... remove unused cells for now
2020-09-28 Luke Kenneth Casso... cut out core for now to focus on ioring
2020-09-28 Luke Kenneth Casso... cut definition of clocks back to minimum
2020-09-28 Luke Kenneth Casso... connect up dummy "NC" pins
2020-09-27 Luke Kenneth Casso... Makefile add chip building
2020-09-27 Luke Kenneth Casso... add soc ioring
2020-09-27 Luke Kenneth Casso... add link to pinmux generation for use in ioring.py
2020-09-19 Luke Kenneth Casso... update ls180.il which successfully (except for 18 track...
2020-09-19 Luke Kenneth Casso... redo litex gateware
2020-09-19 Luke Kenneth Casso... first attempt putting in litex pins instead of bare...
2020-09-15 Jean-Paul ChaputUse Yosys flattening for top blocks.
2020-09-14 Jean-Paul ChaputConfiguration updated for test of HFNS.
2020-09-08 Luke Kenneth Casso... new version of test_issuer.il
2020-08-24 Luke Kenneth Casso... nuts. remove div pipe, use FSM
2020-08-24 Luke Kenneth Casso... update to latest test_issuer.il
2020-08-13 Luke Kenneth Casso... whitespace cleanup
2020-08-13 Luke Kenneth Casso... update to binary-addressed int regfile
2020-08-13 Luke Kenneth Casso... whoops must use "with" on CfgCache
2020-08-12 Jean-Paul ChaputAdded doDesignFlat.py to P&R issuer in a flat way.
2020-08-11 Jean-Paul ChaputCorrect taking in accounts of the parameters settings.
2020-08-11 Luke Kenneth Casso... test_issuer.il with an alternative read/write port...
2020-08-11 Luke Kenneth Casso... fix coriolis2 settings to use new CfgCache
2020-08-11 Luke Kenneth Casso... use new "state" regfile
2020-08-07 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2020-08-07 Jean-Paul ChaputUse of CfgCache. Little beautificaton of doDesign.py
2020-08-05 Luke Kenneth Casso... find semi-suitable width for spr0, add missing int...
2020-08-05 Luke Kenneth Casso... workaround for spr bug
2020-08-05 Luke Kenneth Casso... rename clk/rst to coresync_clk/rst, resize height of...
2020-08-05 Luke Kenneth Casso... comment out pdecode2 block for now
2020-08-05 Luke Kenneth Casso... add coriolis_setup, fix subckt numbering
2020-08-05 Luke Kenneth Casso... add __main__ runner
2020-08-05 Luke Kenneth Casso... indentation and add div0 to blockIssuer
2020-08-05 Luke Kenneth Casso... substitute/indent to reduce to 80 char limit
2020-08-05 Luke Kenneth Casso... add div and mul to test_issuer
2020-08-03 Jean-Paul ChaputFisrt attempt at floorplaning test_issuer.
2020-07-30 Luke Kenneth Casso... remove move unneeded signals from test_issuer.il
2020-07-30 Luke Kenneth Casso... stack of signals that should not have been connected...
2020-07-29 Luke Kenneth Casso... updated test_issuer.il to include new names
2020-07-21 Luke Kenneth Casso... new test_issuer.il, reducing fast regfile ports
2020-07-05 Luke Kenneth Casso... add SPR pipeline (but not DIV for now)
2020-07-02 Luke Kenneth Casso... ignore .ap and .vst files
2020-07-02 Luke Kenneth Casso... name ALUs so as to not have to change cells.lst
2020-07-02 Luke Kenneth Casso... Revert "add div pipeline"
2020-07-02 Luke Kenneth Casso... add div pipeline
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