attempting to access self.msr directly
[soc.git] / src / soc / decoder /
2020-07-14 Luke Kenneth Casso... attempting to access self.msr directly
2020-07-14 Luke Kenneth Casso... add priv instruction checking to ISACaller simulator
2020-07-14 Luke Kenneth Casso... add in privileged instruction decision-making in PowerD...
2020-07-14 Luke Kenneth Casso... comments on PowerDecode2
2020-07-14 Luke Kenneth Casso... add MSR to PowerDecoder2
2020-07-13 Luke Kenneth Casso... remove unneeded spec patching
2020-07-13 Luke Kenneth Casso... enable extswsli tests, fix spec-patching
2020-07-13 Luke Kenneth Casso... fix read of sliced register
2020-07-13 Luke Kenneth Casso... not perfect but close enough: add read registers RA...
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp
2020-07-12 Luke Kenneth Casso... modify PowerDecoder to read LDSTMode correctly
2020-07-12 Luke Kenneth Casso... change CSV LD/ST update field to LDSTMode (support...
2020-07-12 Luke Kenneth Casso... missed setting of link register on OP_BC in PowerDecoder2
2020-07-11 Luke Kenneth Casso... sorting out bigendian/littleendian including in qemu
2020-07-11 Luke Kenneth Casso... whoops output trunc_divs not trunc_div
2020-07-11 Luke Kenneth Casso... special test for mul hw to cope with ignoring OE flag
2020-07-10 Luke Kenneth Casso... add a DIVS function as separate and discrete from floor_div
2020-07-10 Luke Kenneth Casso... check for div_overflow equal to None rather than == 1
2020-07-10 Jacob Lifshayswitch to using Signal.width instead of Signal.shape...
2020-07-10 Jacob Lifshayformat file
2020-07-09 Luke Kenneth Casso... debug information related to 32/64 bit mode
2020-07-09 Luke Kenneth Casso... identifying locations where big/little endian is in...
2020-07-08 Luke Kenneth Casso... stashing current state of investigation whilst looking...
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-07-07 Luke Kenneth Casso... sort-of got binary execution test working
2020-07-07 Luke Kenneth Casso... ordering of tests for OP_ATTN needed shuffling. seems...
2020-07-07 Luke Kenneth Casso... whoops got Function.NONE test wrong in PowerDecode2
2020-07-07 Luke Kenneth Casso... debugging termination (OP_ATTN)
2020-07-07 Luke Kenneth Casso... add halted condition in ISACaller, when attn instructio...
2020-07-06 Luke Kenneth Casso... do abs slightly differently in SelectableInt
2020-07-06 Luke Kenneth Casso... add MULS (signed) version of multiply
2020-07-06 Luke Kenneth Casso... fix SelectableInt abs
2020-07-06 Luke Kenneth Casso... SelectableInt: make __mul__ return enough space to...
2020-07-06 Luke Kenneth Casso... add mtmsr internal op
2020-07-06 Luke Kenneth Casso... add mtmsr internal op
2020-07-05 Luke Kenneth Casso... add mtmsr tests (fail)
2020-07-05 Luke Kenneth Casso... add an illegal instruction trap test
2020-07-05 Luke Kenneth Casso... set up a trap function for microcode override
2020-07-05 Luke Kenneth Casso... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-07-05 Luke Kenneth Casso... stop debug output in power_decoder
2020-07-05 Luke Kenneth Casso... comments in power_regspec_map.py
2020-07-05 Luke Kenneth Casso... comment on spr2, not needed
2020-07-05 Luke Kenneth Casso... split out Decode2ToExecuteType fields involving registers
2020-07-05 Luke Kenneth Casso... sigh read and write xer detection, fix spr and trap...
2020-07-05 Luke Kenneth Casso... move valid signal out of Decode2ToExecute1Type and...
2020-07-05 Luke Kenneth Casso... add slow spr regfile regspec support
2020-07-05 Luke Kenneth Casso... remap SPR PowerISA numbers to internal SPR enum
2020-07-05 Luke Kenneth Casso... missing initialisation of disasm_start
2020-07-05 Luke Kenneth Casso... OP_RFID needs to read SRR0/1, OP_SC needs to write
2020-07-05 Luke Kenneth Casso... fix qemu trap test
2020-07-04 Luke Kenneth Casso... cater for illegal instruction (generates a trap)
2020-07-04 Luke Kenneth Casso... comments in trap about exceptions using microcoding
2020-07-04 Luke Kenneth Casso... whitespace
2020-07-04 Luke Kenneth Casso... more updating spr1/spr2 to fast1/fast2
2020-07-04 Luke Kenneth Casso... use new consts module
2020-07-04 Luke Kenneth Casso... sorting out trap fastregs
2020-07-04 Luke Kenneth Casso... resolve spr names in ISACaller
2020-07-04 Luke Kenneth Casso... sorting out fast/spr naming
2020-07-04 Luke Kenneth Casso... debugging decoding of SPRs (fast)
2020-07-04 Luke Kenneth Casso... add spr test, add decode of spr in/out
2020-07-01 Luke Kenneth Casso... whoops missed some cases in unit test changing ALUHelpers
2020-07-01 Luke Kenneth Casso... print out msr for debug
2020-07-01 Luke Kenneth Casso... attempting to add SPRs to rfid test
2020-07-01 Luke Kenneth Casso... add OP_SC
2020-07-01 Luke Kenneth Casso... add rfid and td/tw trap test
2020-07-01 Luke Kenneth Casso... continue debugging trap pipeline
2020-06-30 Luke Kenneth Casso... add lte ltu for use by twi and other trap functions
2020-06-30 Luke Kenneth Casso... add in pseudocode keyword into mdwn isa files
2020-06-29 Luke Kenneth Casso... add ignore for parsetab.py
2020-06-29 Luke Kenneth Casso... add autogenerated do not commit comment
2020-06-29 Luke Kenneth Casso... update OV and OV32 ISACaller flags if overflow occurs
2020-06-29 Luke Kenneth Casso... attempting to add overflow setting in ISACaller
2020-06-29 Luke Kenneth Casso... whoops, hex parser digits are in multiples of 4 bits
2020-06-20 colepoirierAdd code, commented-out, for TRAP so as to not break...
2020-06-19 Luke Kenneth Casso... move trunc_div and trunc_rem to nmutil
2020-06-19 Luke Kenneth Casso... add comments on trunc_div and trunc_rem
2020-06-19 Luke Kenneth Casso... add docstring comment for SelectableInt
2020-06-19 Luke Kenneth Casso... add test_0_moduw and correct name to trunc_rem
2020-06-19 Luke Kenneth Casso... add abs SelectableInt unit test (very quick)
2020-06-19 Luke Kenneth Casso... add SelectableInt.abs
2020-06-19 Luke Kenneth Casso... add another bad hack in parser.py which identifies...
2020-06-19 Luke Kenneth Casso... add in really bad hack which calls trunc_div or trunc_mod
2020-06-19 Luke Kenneth Casso... add trunc_div and trunch_rem to decoder helpers
2020-06-19 Luke Kenneth Casso... auto-assign needs to use concat / selectconcat
2020-06-19 Luke Kenneth Casso... whoops detected page name wrong, for special case fixed...
2020-06-19 Luke Kenneth Casso... bit of a mess. getting carry recognised and output...
2020-06-19 Luke Kenneth Casso... add auto-assign mode detecting uninitialised variable...
2020-06-19 Luke Kenneth Casso... div needs to be floordiv
2020-06-19 Luke Kenneth Casso... add true and floor div to SelectableInt
2020-06-18 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-18 Luke Kenneth Casso... investigating mtocrf/mtcrf issue
2020-06-17 Luke Kenneth Casso... add bug reference to mtocrf/mtcrf name decoding
2020-06-17 Luke Kenneth Casso... decoding assembly instruction name, move to separate...
2020-06-17 Luke Kenneth Casso... getting sim instruction decoder to reproduce asm instru...
2020-06-17 Luke Kenneth Casso... add comment/assembly decode in power enums
2020-06-17 Luke Kenneth Casso... update test_sim.py to do a simple execution loop: decod...
2020-06-17 Luke Kenneth Casso... get fu compunit test to use ISACaller instruction-memory
2020-06-17 Luke Kenneth Casso... got fed up of adding arguments to ISACaller / ISA,...
2020-06-17 Luke Kenneth Casso... split execute and setup of ISACaller instruction execution
2020-06-17 Luke Kenneth Casso... comment ISACaller setup
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