projects / soc.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
add some data for MMU to actually look up
[soc.git] / src / soc / experiment / test /
2021-05-13 Luke Kenneth Casso... add some data for MMU to actually look up tree | commitdiff
2021-05-13 Luke Kenneth Casso... putting in a lot more debug print statements in DCache... tree | commitdiff
2021-05-12 Luke Kenneth Casso... add dcache tlb / pte test tree | commitdiff
2021-05-12 Luke Kenneth Casso... move dcache unit test to separate test_dcache.py tree | commitdiff
2021-05-12 Luke Kenneth Casso... experimentation with MMU-enabled LoadStore1 through... tree | commitdiff
2021-05-12 Luke Kenneth Casso... add debug info, update comments, disable dcache in... tree | commitdiff
2021-05-12 Luke Kenneth Casso... start doing virtual memory queries via PortInterface... tree | commitdiff
2021-05-12 Luke Kenneth Casso... whoops missing default zero (no idea how) tree | commitdiff
2021-05-12 Luke Kenneth Casso... addcomments for MMU PortInterface test (how it, um... tree | commitdiff
2021-05-12 Luke Kenneth Casso... bit of a hack to get test_mmu_dcache_pi.py operational. tree | commitdiff
2021-05-12 Luke Kenneth Casso... whitespace tree | commitdiff
2021-05-11 Luke Kenneth Casso... pass through MSR.PR through PortInterface, into LoadStore1 tree | commitdiff
2021-05-09 Luke Kenneth Casso... add misalign flag to PortInterfaceBase tree | commitdiff
2021-05-01 Luke Kenneth Casso... whitespace tree | commitdiff
2021-04-23 Luke Kenneth Casso... move over to from openpower imports tree | commitdiff
2021-02-24 Tobias Platenwb_get: write outputs to seperate logfile too tree | commitdiff
2021-02-20 Luke Kenneth Casso... remove massive code-duplication, move simple "self... tree | commitdiff
2021-01-01 Cesar StraussAdd zero CR test case and fix comments tree | commitdiff
2021-01-01 Cesar StraussAdd test cases with rc=1 tree | commitdiff
2021-01-01 Cesar StraussMake all ports the same size, on the test ALU tree | commitdiff
2021-01-01 Cesar StraussAdd CR output port to test cases tree | commitdiff
2021-01-01 Cesar StraussMove NOP test case earlier tree | commitdiff
2020-12-31 Cesar StraussImplement and test NOP in the test ALU tree | commitdiff
2020-12-31 Cesar StraussDon't use OP_NOP for zero-delay subtraction tree | commitdiff
2020-12-31 Cesar StraussTest first input port being masked out tree | commitdiff
2020-12-31 Cesar StraussTest masked-out second input port tree | commitdiff
2020-12-31 Cesar StraussShow rdmaskn and wrmask in GTKWave tree | commitdiff
2020-12-31 Cesar StraussUse the increment operator tree | commitdiff
2020-12-31 Cesar StraussAdd support for masked write operations tree | commitdiff
2020-12-31 Cesar StraussClarify reason for holding rdmaskn valid during the... tree | commitdiff
2020-12-31 Cesar StraussRemove previous version of the CompUnit parallel unit... tree | commitdiff
2020-12-31 Cesar StraussOnly hold the decoder signals for one cycle, along... tree | commitdiff
2020-12-30 Cesar StraussTest the rdmaskn control signal tree | commitdiff
2020-12-07 Cesar StraussDisplay the instruction type as a vector on cxxsim tree | commitdiff
2020-12-06 Cesar StraussUpdate GTKWave documents to work with latest cxxsim tree | commitdiff
2020-11-24 Cesar StraussFix some typos and whitespace tree | commitdiff
2020-11-24 Cesar StraussPort the DummyALU test case to the new parallel issuer tree | commitdiff
2020-11-23 Cesar StraussResults are now a list, so "expected" should follow... tree | commitdiff
2020-11-23 Cesar StraussParameterize the issuer on the number of operands and... tree | commitdiff
2020-11-22 Cesar StraussRefactor the ALU operation issuer into a class tree | commitdiff
2020-11-22 Cesar StraussPort the ALU test case to the new parallel test style tree | commitdiff
2020-11-22 Cesar StraussAdd a GTKWave document to the ALU test case tree | commitdiff
2020-11-19 Cesar StraussSeparate input and output ports by color tree | commitdiff
2020-11-19 Cesar StraussExplain the test cases tree | commitdiff
2020-11-18 Cesar StraussSeparate individual traces for each rel_o/go_i port tree | commitdiff
2020-11-16 Cesar StraussAdd a transaction counter to producers and consumers tree | commitdiff
2020-11-15 Cesar StraussImplement ResultConsumer and port the Shifter unit... tree | commitdiff
2020-11-14 Cesar StraussMove the DUT driver to within the test case process tree | commitdiff
2020-11-14 Cesar StraussFix and enable the regspec test for the Shifter tree | commitdiff
2020-10-28 Cesar StraussImplement an operand producer that talks the rel_o... tree | commitdiff
2020-10-18 Cole Poirieruse random.seed to generate repro cases of the two... tree | commitdiff
2020-10-08 Luke Kenneth Casso... minor icache cleanup tree | commitdiff
2020-10-08 Cole Poiriersecond attempt at https://bugs.libre-soc.org/show_bug... tree | commitdiff
2020-10-08 Cole Poirierremove singleton dict per https://bugs.libre-soc.org... tree | commitdiff
2020-10-08 Cole Poirierfirst attempt at 3) of tree | commitdiff
2020-10-08 Cole Poiriermodify wb_get per 1) of https://bugs.libre-soc.org... tree | commitdiff
2020-10-06 Tobias Platentest_mmu_dcache_pi.py tree | commitdiff
2020-10-01 Cesar StraussAdd GTKWave document to test_compunit_fsm tree | commitdiff
2020-09-27 Cesar StraussConvert yet another few tests to be able to use latest... tree | commitdiff
2020-09-20 Luke Kenneth Casso... resolve issues in async sim: must not drive async clock... tree | commitdiff
2020-09-20 Luke Kenneth Casso... still experimenting with async FF sync tree | commitdiff
2020-09-20 Luke Kenneth Casso... continuing async clock experimenting tree | commitdiff
2020-09-20 Luke Kenneth Casso... add an async clock synchronizer experiment tree | commitdiff
2020-09-14 Luke Kenneth Casso... reorg mmu lookup test so it is called twice tree | commitdiff
2020-09-14 Luke Kenneth Casso... add mmu-dcache test tree | commitdiff
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures tree | commitdiff
2020-08-24 Tobias PlatenTestCachedMemoryPortInterface cleanup tree | commitdiff
2020-08-24 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-22 Luke Kenneth Casso... rename invert_a to invert_in because logical inverts RB tree | commitdiff
2020-08-21 Tobias Platentypo fix in test_l0_cache_buffer2.py tree | commitdiff
2020-08-21 Tobias Platenconnect TestCachedMemoryPortInterface to LDSTSplitter tree | commitdiff
2020-08-21 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-20 Tobias Platenstart wiring TestCachedMemoryPortInterface tree | commitdiff
2020-08-20 Tobias Platentestcase refactoring tree | commitdiff
2020-08-18 Tobias Platenadd testcase for LDSTSplitter using PortInterface tree | commitdiff
2020-08-11 Tobias Plateninitial version of L0CacheBuffer2 tree | commitdiff
2020-07-29 Luke Kenneth Casso... bit of a big change: add prefixes "cu_" to all CompUnit... tree | commitdiff
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master' tree | commitdiff
2020-07-22 Jacob Lifshayformat code tree | commitdiff
2020-07-21 Luke Kenneth Casso... testing if MultiCompUnit can handle no input regs ... tree | commitdiff
2020-07-21 Luke Kenneth Casso... disable cxxsim for now tree | commitdiff
2020-07-19 Luke Kenneth Casso... convert compalu multi test to Simulator() (was run_simu... tree | commitdiff
2020-07-19 Luke Kenneth Casso... convert compalu multi test to Simulator() (was run_simu... tree | commitdiff
2020-07-19 Luke Kenneth Casso... add some CompUnit demo tests of the alu_fsm example tree | commitdiff
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp tree | commitdiff
2020-06-28 Cesar StraussStart with a simpler test case tree | commitdiff
2020-06-27 Luke Kenneth Casso... add wishbone Pi2LSUI test tree | commitdiff
2020-06-27 Luke Kenneth Casso... reconfigureable PortInterface testing now possible tree | commitdiff
2020-06-26 Luke Kenneth Casso... slight reorg on test_pi2ls.py tree | commitdiff
2020-06-26 Luke Kenneth Casso... add quick test showing Pi2LSUI not quite reading/writing to tree | commitdiff
2020-06-26 Luke Kenneth Casso... remove extraneous yields tree | commitdiff
2020-06-26 Michael NolanModify pi2ls so it passes the portinterface unit tests tree | commitdiff
2020-06-26 Luke Kenneth Casso... set address ok and fix unit test to check it properly tree | commitdiff
2020-06-26 Luke Kenneth Casso... add pi.busy_o connection, increase to 64 bit tree | commitdiff
2020-06-26 Luke Kenneth Casso... unit test broken is ok :) tree | commitdiff
2020-06-26 Michael NolanMove tests for pimem to new file, add ability to test... tree | commitdiff
2020-06-09 Cesar StraussAvoid a combinatorial loop on valid_o tree | commitdiff
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2020-06-03 Cesar StraussCheck completion of the sub-processes tree | commitdiff
2020-06-03 Cesar StraussSimplify immediate check tree | commitdiff
next