2020-09-04 |
Luke Kenneth Casso... | bring out XICS ICS interrupt levels so that they can... |
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2020-09-04 |
Luke Kenneth Casso... | adding option to include XICS external interrupts. |
tree | commitdiff |
2020-09-04 |
Luke Kenneth Casso... | add means to run hello_world.bin under simulation |
tree | commitdiff |
2020-09-04 |
Jacob Lifshay | update to match refactored power-instruction-analyzer API |
tree | commitdiff |
2020-09-03 |
Samuel A. Falvo II | Provide full name and email in copyright notice. |
tree | commitdiff |
2020-09-03 |
Luke Kenneth Casso... | do more on dcache conversion |
tree | commitdiff |
2020-09-03 |
Luke Kenneth Casso... | testing microwatt 3.bin (2.bin ok) |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | when mtocrf FXM is 0, the CR has to be set to CR7 |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | fix bug in cmpli (and cmplw) |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | sign-extend lhax needs 16-64, separate from lwax which... |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | add bc ctr regression test when CTR=0 and CTR=1 |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | bug in carry32 handling in OP_CMP |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | add cmpl regression test (one binary, one assembly) |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | add cmpl microwatt 1.bin test, cmpl |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | series of extensive modifications to fix long-standing... |
tree | commitdiff |
2020-08-31 |
Luke Kenneth Casso... | add XER to fastregs and "construct" it in mfspr/mtspr |
tree | commitdiff |
2020-08-30 |
Luke Kenneth Casso... | redo OP_CMP based on microwatt. L=1 had been ignored |
tree | commitdiff |
2020-08-30 |
Luke Kenneth Casso... | reversal of FXM mask for one-hot selection in OP_MTCR... |
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2020-08-30 |
Luke Kenneth Casso... | working on dcache.py |
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2020-08-30 |
Luke Kenneth Casso... | tidyup on mul proof |
tree | commitdiff |
2020-08-30 |
Luke Kenneth Casso... | set mul post_stage o.ok only when needed, and fix xer_s... |
tree | commitdiff |
2020-08-30 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-30 |
Cole Poirier | icache.py commit progress, about a third through the... |
tree | commitdiff |
2020-08-29 |
Samuel A. Falvo II | Qualify XER_OV output in proof |
tree | commitdiff |
2020-08-29 |
Samuel A. Falvo II | Fix test breakage in MUL proofs |
tree | commitdiff |
2020-08-29 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-29 |
Cole Poirier | mmu.py, dcache.py, mem_types.py change types capitaliza... |
tree | commitdiff |
2020-08-29 |
Cole Poirier | mem_types add more types from common.vhdl specifially... |
tree | commitdiff |
2020-08-29 |
Cole Poirier | mem_types.py arrange in alphabetical order for ease... |
tree | commitdiff |
2020-08-29 |
Samuel A. Falvo II | BROKEN: xer_ov_o != dut.o.xer_ov.data ???!!! |
tree | commitdiff |
2020-08-29 |
Cole Poirier | mmu.py remove duplicate comment left over from mmu... |
tree | commitdiff |
2020-08-29 |
Cole Poirier | icache.py initial commit of first attempt at translatio... |
tree | commitdiff |
2020-08-29 |
Cesar Strauss | Move new write_gtkw and its example to nmutil |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | minor code-shuffle, comments |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | slowly morphing towards using an XER bit-field selector... |
tree | commitdiff |
2020-08-29 |
Samuel A. Falvo II | MUL pipeline formal proofs complete, I *think*. |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | break down XER into flags |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add XER read via DMI interface to sim.py |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add hack to get at XER through DMI interface |
tree | commitdiff |
2020-08-29 |
Samuel A. Falvo II | WIP: prep for 64-bit insns |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | yep disable OE for MULH64/32 and EXTS and CNTZ |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | investigating CR mtocrf / mfocrf |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add additional CR regression tests |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | allow pseudocode numbering to decrement in for-loops |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add wat to write out raw binary assembled programs |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | CR FXM becomes a full mask. |
tree | commitdiff |
2020-08-28 |
Cole Poirier | dcache.py add first attempt at translation of dcache_tb... |
tree | commitdiff |
2020-08-27 |
Cole Poirier | dcache.py add skeleton sim and test adapted from mmu... |
tree | commitdiff |
2020-08-27 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-27 |
Cole Poirier | dcache.py implement the remaining vhdl generate stateme... |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | https://bugs.libre-soc.org/show_bug.cgi?id=476 |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | xer so is not being passed through to CR0 |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | really bad hack to fix simulator bug in carry handling |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | augment addme test case to show bug #476 |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | add addze and addme uni tests |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | incompatibility with POWER9 on mulhw/u due to lack... |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | overflow-enable does not occur on shift operations |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | oink, write_cr shiftrot record width was zero (??) |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | sorting out shift_rot to use new output stage data... |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | need to read SO if Rc=1 |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | reorg of SO handling related to CR0 |
tree | commitdiff |
2020-08-26 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-26 |
Cole Poirier | dcache.py replace subtypes/types/constant aliases with... |
tree | commitdiff |
2020-08-26 |
Luke Kenneth Casso... | use sub-test in logical test_pipe_caller |
tree | commitdiff |
2020-08-26 |
Luke Kenneth Casso... | investigating div fsm and simulator bug |
tree | commitdiff |
2020-08-25 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py rearrange, transform classes into functions... |
tree | commitdiff |
2020-08-25 |
Jacob Lifshay | fix broken remainder for div FSM |
tree | commitdiff |
2020-08-25 |
Jacob Lifshay | clean up formatting |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | although shift-rot does not alter XER.so it still needs... |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | add way to capture CR from DMI in litex sim |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | add CR read to DMI interface |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | shorten using temp vars |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | add CR DMI interface |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | add crxor unit test to qemu |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py fix whitespace, fomatting, syntax |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py fix formatting |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py move Reservation RecordObject to top of file |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py move RegStage1 RecordObject to top of file |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py move MemAccessRequest RecordObject to top... |
tree | commitdiff |
2020-08-25 |
Cole Poirier | dcache.py move Stage0 RecordObject to top of file |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | argh, reading regfile over DMI was overlapped and corru... |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | add isel CR tests to run on qemu (confirmed working) |
tree | commitdiff |
2020-08-24 |
Tobias Platen | TestCachedMemoryPortInterface cleanup |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | make it easier to select FSM/Pipe DIV unit |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | fix *another* ld-update-related timing / FSM issue |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | tidyup / shuffle after review |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | remove default parameter |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | "WAY" does not exist - range(NUM_WAYS) was intended |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | use WAY_BITS in appropriate locations |
tree | commitdiff |
2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-24 |
Cole Poirier | dcache.py commit first full tranlation pass, about... |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | update copyright notices to include additional primary... |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | add load algebraic immediate unit test |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | add algebraic ld tests lwax, lwaux |
tree | commitdiff |
2020-08-23 |
Michael Nolan | Add copyright to files I primarily authored in simulator/ |
tree | commitdiff |
2020-08-23 |
Michael Nolan | Add copyright to files in fu/ that I was the primary... |
tree | commitdiff |
2020-08-23 |
Michael Nolan | Add copyright statement to power_decoder.py |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | bring "core stopped" signal out through DMI interface |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | add in DMI "stat" loop which monitors core "stopping" |
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