soc.git
2020-06-04 Luke Kenneth... remove unneeded imports
2020-06-04 Luke Kenneth... use copy of FHDLTestCase
2020-06-04 Luke Kenneth... connect up write-ports from Regfiles to FUs
2020-06-04 Luke Kenneth... docstring for AllFunctionUnits
2020-06-04 Luke Kenneth... missing a fastregs write-port
2020-06-04 Luke Kenneth... update docstring on simple/core.py
2020-06-04 Luke Kenneth... move regfile/spec organiser to separate function
2020-06-04 Luke Kenneth... mention convenience variables
2020-06-04 Luke Kenneth... rename trap to use convenience variables
2020-06-04 colepoirierUndo damage done by deleting VHDL microwatt comments,
2020-06-04 Luke Kenneth... collate fu-enable signals
2020-06-04 Luke Kenneth... connect up Function Unit operand subsets
2020-06-03 Luke Kenneth... forgot to add in rdflag enable
2020-06-03 Luke Kenneth... whoops, regfiles are uppercase
2020-06-03 Luke Kenneth... whoops needed a bit of a reorg of the data structure...
2020-06-03 Luke Kenneth... hmmm got naming wrong in regfile-fu connectivity
2020-06-03 Luke Kenneth... whoops names of regfiles are lower-case
2020-06-03 Luke Kenneth... munge/redirect the regfile port based on the naming
2020-06-03 Luke Kenneth... connect read-enable and src_i to regfile ports
2020-06-03 Luke Kenneth... link up PriorityPickers on read channels
2020-06-03 Luke Kenneth... put rdspecs into a different dictionary
2020-06-03 Luke Kenneth... start putting a non-production core together,
2020-06-03 Luke Kenneth... add a simple core, not intended for production use
2020-06-03 Luke Kenneth... correct comments on regspec decode map
2020-06-03 Luke Kenneth... only select xer_xo if OE enabled
2020-06-03 Luke Kenneth... decide to elaborate Refiles *into* another class, rathe...
2020-06-03 Luke Kenneth... turn RegFiles into module, add all regfiles to it
2020-06-03 Luke Kenneth... add a simple class containing all FunctionUnits
2020-06-03 Tobias Platenmore work on proof_datamerger.py
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Luke Kenneth... add class containing all regfiles
2020-06-03 Luke Kenneth... whitespace
2020-06-03 Luke Kenneth... use common get_cu_inputs for CR unit tests
2020-06-03 Luke Kenneth... convert shift_rot tests to use common get_cu_inputs...
2020-06-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-06-03 Tobias Platenwhitespace fix for proof_datamerger.py
2020-06-03 Luke Kenneth... reorganise ALU tests, move get_cu_inputs function to...
2020-06-03 Luke Kenneth... worked out how to dynamically enable carry-in to ALU...
2020-06-03 Luke Kenneth... correct overflow-enable flags for rdmask specs in ALU
2020-06-03 Luke Kenneth... attempt to make carry-in and overflow-enable optional...
2020-06-03 Luke Kenneth... remove rdflags in pipe_data.py (redundant)
2020-06-03 Luke Kenneth... move over to using power_regspec_map.py from PowerDecod...
2020-06-03 Luke Kenneth... move obtaining simulator data into common function...
2020-06-03 Luke Kenneth... mention TODO on SPR regfile
2020-06-03 Cesar StraussCheck completion of the sub-processes
2020-06-03 colepoirierFixed missing nia.ok.eq(1) in OP_RFID
2020-06-03 colepoirierFixed merge conflict by using remote changes
2020-06-03 Luke Kenneth... tidyup branch. comments
2020-06-03 Luke Kenneth... convenience variables
2020-06-03 Luke Kenneth... FormX not FormXL
2020-06-03 Luke Kenneth... add bit more TODO
2020-06-03 Luke Kenneth... update submodule for ISA tables
2020-06-03 Luke Kenneth... convenience rename for spr pipe_data.py, consistent...
2020-06-03 Cesar StraussSimplify immediate check
2020-06-03 Luke Kenneth... add more TODOs
2020-06-03 Cesar StraussPreliminary check of the alu protocol
2020-06-03 Cesar StraussPass along the operand, in the cycle in which go is...
2020-06-03 colepoirierFixed OP_RFID and OP_SC in fu/trap/main_stage
2020-06-03 Luke Kenneth... add some more constants and ref to POWER9 pdf
2020-06-03 Luke Kenneth... add an if for OP_MTMSR and some comments
2020-06-03 colepoirierAttempted to fix OP_RFID in TRAP pipeline
2020-06-02 colepoirierImplement TRAP instructions OP_RFID and OP_SC
2020-06-02 Luke Kenneth... argh - bad hack, detecting when there are no registers...
2020-06-02 Luke Kenneth... take out unneeded code, add Settle() to see if it helps...
2020-06-02 Luke Kenneth... add lk field to DecodeOut2
2020-06-02 Luke Kenneth... move setting cia input to branch from get_cu_inputs...
2020-06-02 Luke Kenneth... hooray, get_cu_inputs now common to both types of tests
2020-06-02 Luke Kenneth... oooo very annoying. there does not appear to be any...
2020-06-02 Luke Kenneth... add get_inputs function to branch test_pipe_caller
2020-06-02 Luke Kenneth... remove unneeded variable
2020-06-02 Luke Kenneth... Revert "ok ok - for OP_BCREG put CTR in spr2 as well"
2020-06-02 Luke Kenneth... ok ok - for OP_BCREG put CTR in spr2 as well
2020-06-02 Michael NolanSelect spr1 for bcctr - use fast_spr decoding from...
2020-06-02 Luke Kenneth... set up CTR and LR only on BCREG when needed
2020-06-02 Luke Kenneth... decode fast spr for OP_BCREG CTR, TAR and LR
2020-06-02 Luke Kenneth... add TODO comments for read_fast1/2
2020-06-02 Tobias Platenproof_datamerger: proof that output is zero when idle
2020-06-02 Luke Kenneth... argh overlapping commits on submodule (rebase did not...
2020-06-02 Luke Kenneth... debugging branch fast registers
2020-06-02 Michael NolanFix broken wiki version
2020-06-02 Michael NolanHandle removal of spr2 field from decoder
2020-06-02 Luke Kenneth... add comment about fast1 and fast2 in branch test_pipe_c...
2020-06-02 Luke Kenneth... add regspecmap function to PowerDecode2
2020-06-02 Michael NolanFix test_bc_reg
2020-06-02 Michael NolanFix issues with test_bc_reg, wrong instruction field...
2020-06-02 Luke Kenneth... move regspec function to separate module
2020-06-02 Luke Kenneth... add in fast regs support in decoder and into regspec_decode
2020-06-02 Luke Kenneth... add 2nd write-reg for LD/ST Update mode
2020-06-02 Luke Kenneth... add write-regs encoding to regspec decoder
2020-06-02 Luke Kenneth... add read-write register numbering detection
2020-06-02 Luke Kenneth... whoops cut/paste error, creating write_ports not read_ports
2020-06-02 Luke Kenneth... whoops syntax error
2020-06-02 Luke Kenneth... add function expressing the relationship between regspe...
2020-06-02 Luke Kenneth... whitespace
2020-06-02 Luke Kenneth... rename regspecs to give a consistent naming scheme
2020-06-02 Luke Kenneth... add MSR constants, TODO translated
2020-06-02 Luke Kenneth... add TODO comments from microwatt source code
2020-06-02 Cesar StraussAllow at least one operand to be fetched
2020-06-02 Cesar StraussHold rdmaskn active during the busy_o cycle
2020-06-01 Luke Kenneth... remove reading port 3 for CR pipeline. RS moved to...
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