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soc.git
2020-07-04
Luke Kenneth...
more rename spr1/spr2 to fast1/fast2
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2020-07-04
Luke Kenneth...
whitespace
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2020-07-04
Luke Kenneth...
more updating spr1/spr2 to fast1/fast2
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2020-07-04
Luke Kenneth...
more updating spr1/spr2 to fast1/fast2
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2020-07-04
Luke Kenneth...
rename spr1/spr2 to fast1/fast2 in branch
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2020-07-04
Luke Kenneth...
update trap docstring
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2020-07-04
Luke Kenneth...
use new consts module
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2020-07-04
Luke Kenneth...
sorting out trap fastregs
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2020-07-04
Luke Kenneth...
sort out trap test reg checking
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2020-07-04
Luke Kenneth...
resolve spr names in ISACaller
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2020-07-04
Luke Kenneth...
rename spr1 to fast1 in trap data
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2020-07-04
Luke Kenneth...
sorting out fast/spr naming
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2020-07-04
Luke Kenneth...
oops initialise Function Unit class with idx
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2020-07-04
Luke Kenneth...
add first cookie-cut test_trap_compunit.py
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2020-07-04
Luke Kenneth...
add gitignores
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2020-07-04
Luke Kenneth...
debugging decoding of SPRs (fast)
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2020-07-04
Luke Kenneth...
add spr test, add decode of spr in/out
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2020-07-04
Luke Kenneth...
add spr main stage
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2020-07-04
Luke Kenneth...
add spr input record
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2020-07-04
Luke Kenneth...
add SPR pipeline
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2020-07-04
Luke Kenneth...
reduce steps per stage to 8
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2020-07-03
Luke Kenneth...
set only div/rem supported
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2020-07-02
Luke Kenneth...
allow flexible selection of the types of ALUs
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2020-07-02
Luke Kenneth...
fix unit tests due to change in using pspec
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2020-07-02
Luke Kenneth...
use Mock class (more convenient)
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2020-07-02
Luke Kenneth...
allow ALU names to propagate through from FU to CompUni...
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2020-07-02
Luke Kenneth...
name function unit ALUs
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2020-07-02
Luke Kenneth...
comment out DIV unit for now
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2020-07-02
Luke Kenneth...
increase combinatorial stages to 8
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2020-07-02
Luke Kenneth...
reduce DIV radix to 1
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2020-07-02
Luke Kenneth...
add DIV function unit to compunits
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2020-07-02
Luke Kenneth...
add trap function unit into compunits
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2020-07-02
Luke Kenneth...
add bare wishbone option to TestIssuer, sort out ports
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2020-07-02
Luke Kenneth...
use single-arg pspec for TestIssuer and Core
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2020-07-02
Luke Kenneth...
first experimental index.rst for sphinx documentation
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2020-07-02
Luke Kenneth...
add sphinx doc preliminary start
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2020-07-02
Cesar Strauss
Present the ALU result only when valid_o is active
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2020-07-01
Luke Kenneth...
whoops missed some cases in unit test changing ALUHelpers
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2020-07-01
Luke Kenneth...
minor reorg on how Bus and Config classes are set up
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2020-07-01
Luke Kenneth...
whoops swapped trap test instructions accidentally
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2020-07-01
Luke Kenneth...
print out msr for debug
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2020-07-01
Luke Kenneth...
attempting to add SPRs to rfid test
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2020-07-01
Luke Kenneth...
add OP_SC
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2020-07-01
Luke Kenneth...
trap test check results
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2020-07-01
Luke Kenneth...
add name "test_issuer" to ilang conversion
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2020-07-01
Luke Kenneth...
add in trap compunit
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2020-07-01
Luke Kenneth...
add rfid and td/tw trap test
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2020-07-01
Luke Kenneth...
continue debugging trap pipeline
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2020-07-01
Luke Kenneth...
debugging trap pipeline
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2020-07-01
Luke Kenneth...
start running trap unit test, fixing errors
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2020-06-30
Luke Kenneth...
add lte ltu for use by twi and other trap functions
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2020-06-30
Luke Kenneth...
add in pseudocode keyword into mdwn isa files
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2020-06-30
Luke Kenneth...
code-morph on div pipeline
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2020-06-29
Luke Kenneth...
add README for fu directory
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2020-06-29
Luke Kenneth...
use correct ALUHelpers in div test
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2020-06-29
Luke Kenneth...
sort out syntax errors in div
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2020-06-29
Luke Kenneth...
first unit test for div
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2020-06-29
Luke Kenneth...
update submodule to fix div bug
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2020-06-29
Luke Kenneth...
add ignore for parsetab.py
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2020-06-29
Luke Kenneth...
add autogenerated do not commit comment
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2020-06-29
Luke Kenneth...
update submodule to div overflow
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2020-06-29
Luke Kenneth...
separate out divide by zero cases
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2020-06-29
Luke Kenneth...
update OV and OV32 ISACaller flags if overflow occurs
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2020-06-29
Luke Kenneth...
attempting to add overflow setting in ISACaller
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2020-06-29
Luke Kenneth...
whoops, hex parser digits are in multiples of 4 bits
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2020-06-29
Luke Kenneth...
fetch instructions from bare wishbone fetch unit
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2020-06-28
Cesar Strauss
Start with a simpler test case
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2020-06-28
Cesar Strauss
Let p.ready_o be active while the test ALU is idle
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2020-06-28
Luke Kenneth...
add cached fetch unit pass-through args
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2020-06-28
Luke Kenneth...
need args to WishboneArbiter, match data width size
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2020-06-28
Cesar Strauss
Add missing ports to the test ALU
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2020-06-28
Luke Kenneth...
read from instruction memory using FetchUnitInterface
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2020-06-28
Luke Kenneth...
add Config Fetch interface and quick unit test
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2020-06-28
Luke Kenneth...
add test instruction memory
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2020-06-28
Luke Kenneth...
add readonly option to TestMemory
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2020-06-28
Luke Kenneth...
expand instruction bus width to 64 bit, start on a...
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2020-06-28
Luke Kenneth...
parameterise minerva i-cache
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2020-06-28
Luke Kenneth...
got Pi2LSUI FSM working
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2020-06-28
Luke Kenneth...
sram address do not cut by LSBs
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2020-06-28
Luke Kenneth...
new Pi2LSUI working, using PortInterfaceBase
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2020-06-28
Luke Kenneth...
start new version of Pi2LSUI based on PortInterfaceBase
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2020-06-28
Luke Kenneth...
pass addr/mask through to PortInterfaceBase rd/wr addr
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2020-06-28
Luke Kenneth...
cleanup (remove unneeded imports)
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2020-06-28
Luke Kenneth...
more code-shuffle for TestMemoryPortInterface
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2020-06-28
Luke Kenneth...
more code-shuffle for TestMemoryPortInterface
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2020-06-28
Luke Kenneth...
minor cleanup, put get/set rdport/wrport into function
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2020-06-28
Luke Kenneth...
merge LDSTPort into TestMemoryPortInterface
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2020-06-28
Luke Kenneth...
use PortInterface connect_port
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2020-06-28
Luke Kenneth...
use PortInterface connect_port
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2020-06-28
Luke Kenneth...
attempt to get Pi2LSUI FSM working
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2020-06-27
Luke Kenneth...
only activate ld_in_progress if addr is ok
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2020-06-27
Luke Kenneth...
make Memory accessible via TestSRAMBareLoadStoreUnit
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2020-06-27
Luke Kenneth...
increase (double) address width in TstL0CacheBuffer
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2020-06-27
Luke Kenneth...
increase (double) address width in TstL0CacheBuffer
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2020-06-27
Luke Kenneth...
unit test in l0_cache to connect to testpi and test_bare_wb
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2020-06-27
Luke Kenneth...
make PortInterface modules consistent with same API
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2020-06-27
Luke Kenneth...
use ConfigMemoryPortInterface in TstL0CacheBuffer
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2020-06-27
Luke Kenneth...
fix TestMemLoadStoreUnit, it required a FSM to monitor...
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2020-06-27
Luke Kenneth...
add wishbone Pi2LSUI test
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2020-06-27
Luke Kenneth...
reconfigureable PortInterface testing now possible
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