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whoops, import error
[soc.git] / src /
2021-05-07 Luke Kenneth Casso... whoops, import error tree | commitdiff
2021-05-07 Luke Kenneth Casso... move LoadStore1 class to soc.fu.ldst.loadstore tree | commitdiff
2021-05-07 Luke Kenneth Casso... whoops was still copying output over in CommonOutputStage tree | commitdiff
2021-05-07 Luke Kenneth Casso... how we managed to get this far without noticing that... tree | commitdiff
2021-05-07 Luke Kenneth Casso... move dsisr and dar into LoadStore1 tree | commitdiff
2021-05-07 Luke Kenneth Casso... move zero-dest-pred in Common Output Stage to not copy... tree | commitdiff
2021-05-07 Luke Kenneth Casso... whoops setup of core.sv_pred_sm/dm not indented and... tree | commitdiff
2021-05-06 Luke Kenneth Casso... whoops disabled tests agaaaaain tree | commitdiff
2021-05-06 Luke Kenneth Casso... pass relevant predicate mask bits through to Decoders... tree | commitdiff
2021-05-06 Luke Kenneth Casso... add in predicate mask bit detection when zeroing is... tree | commitdiff
2021-05-06 Luke Kenneth Casso... pass SVP64 ReMap field through to core and then on... tree | commitdiff
2021-05-06 Luke Kenneth Casso... moved exts* SVP64 unit tests to a different location tree | commitdiff
2021-05-06 Luke Kenneth Casso... if zeroing is set, put zero into input or output as... tree | commitdiff
2021-05-05 Tobias Platenfix bug in mmu/fsm.py tree | commitdiff
2021-05-05 Luke Kenneth Casso... put sv_input_record_layout onto CompOpSubsetBase after all tree | commitdiff
2021-05-05 Luke Kenneth Casso... whoops wrong signal name, set exc_happened tree | commitdiff
2021-05-05 Luke Kenneth Casso... add SVP64 RM fields to ALU input record tree | commitdiff
2021-05-04 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-05-04 Tobias Platenimplement MFSPR the same way as fu/spr/main_stage.py tree | commitdiff
2021-05-04 Luke Kenneth Casso... remove minerva debug unit (not needed) tree | commitdiff
2021-05-04 Jonathan Neuschäferminerva tests: Don't import soc.minerva.csr tree | commitdiff
2021-05-04 Luke Kenneth Casso... whoops disabled some test_issuer group tests tree | commitdiff
2021-05-04 Luke Kenneth Casso... add SVSTATE (SVSRR0) to TRAP pipeline tree | commitdiff
2021-05-04 Tobias Platenupate dsisr and dar using sync tree | commitdiff
2021-05-04 Luke Kenneth Casso... adding fast3 SPR to Trap pipeline and unit test tree | commitdiff
2021-05-04 Luke Kenneth Casso... new fast3 needs to be remapped to fast1 port in "reduce... tree | commitdiff
2021-05-04 Luke Kenneth Casso... missed that soc.regfile.util has moved to openpower... tree | commitdiff
2021-05-04 Luke Kenneth Casso... add SVSRR0 to FastRegsEnum tree | commitdiff
2021-05-04 Luke Kenneth Casso... add TODO comments and cross-reference to bug tree | commitdiff
2021-05-04 Luke Kenneth Casso... note a way to see if an exception happened, in TestIssuer tree | commitdiff
2021-05-04 Luke Kenneth Casso... add printout showing exception output from FUs tree | commitdiff
2021-05-04 Luke Kenneth Casso... more rename of exception_o to exc_o, add convenience... tree | commitdiff
2021-05-04 Luke Kenneth Casso... wire in exc_o.happened into write-cancellation of LDSTC... tree | commitdiff
2021-05-04 Luke Kenneth Casso... comments, and change name of LDSTCompUnit exception_o... tree | commitdiff
2021-05-04 Luke Kenneth Casso... remove exception from data on FUBaseData, explicitly... tree | commitdiff
2021-05-04 Luke Kenneth Casso... code-comments for LDSTCompUnit tree | commitdiff
2021-05-04 Luke Kenneth Casso... add LDSTException class to LDSTOutputData tree | commitdiff
2021-05-04 Luke Kenneth Casso... add option to add exception type to FUBaseData (pipe_data) tree | commitdiff
2021-05-04 Luke Kenneth Casso... rename IntegerData to FUBaseData tree | commitdiff
2021-05-04 Luke Kenneth Casso... comment out nc (nocache), it seems to actually work tree | commitdiff
2021-05-03 Luke Kenneth Casso... MMU: get store to activate only when data is available... tree | commitdiff
2021-05-03 Luke Kenneth Casso... disable the cache for now, whilst testing read/write... tree | commitdiff
2021-05-02 Luke Kenneth Casso... use Const to define bit-length when comparing top nibbl... tree | commitdiff
2021-05-02 Luke Kenneth Casso... mmu FSM store in dcache: only put data onto d_in on... tree | commitdiff
2021-05-02 Luke Kenneth Casso... return d_out.valid instead of always "ok" in MMU FSM tree | commitdiff
2021-05-02 Luke Kenneth Casso... HACK WARNING: disable d-cache on hard-coded address... tree | commitdiff
2021-05-02 Luke Kenneth Casso... add nc argument to dcache load/store tests tree | commitdiff
2021-05-02 Luke Kenneth Casso... quick hack to SRAM test and to dcache to enable classic... tree | commitdiff
2021-05-01 Luke Kenneth Casso... enable issuer_verilog.py to generate new MMU/DCache... tree | commitdiff
2021-05-01 Luke Kenneth Casso... send a DMI RESET at the end of the test. tree | commitdiff
2021-05-01 Luke Kenneth Casso... store data in microwatt dcache goes in one cycle AFTER... tree | commitdiff
2021-05-01 Luke Kenneth Casso... dcache store test: data goes in one cycle AFTER valid... tree | commitdiff
2021-05-01 Luke Kenneth Casso... only do dcache lookup for now tree | commitdiff
2021-05-01 Cesar StraussAdd GTKWave documents to each DCache unit test tree | commitdiff
2021-05-01 Luke Kenneth Casso... add LD/ST cases to MMU, which should all still work tree | commitdiff
2021-05-01 Luke Kenneth Casso... add MMUTestCaseROM tree | commitdiff
2021-05-01 Luke Kenneth Casso... whitespace tree | commitdiff
2021-05-01 Luke Kenneth Casso... use new AllFunctionUnits.get_fu function tree | commitdiff
2021-05-01 Luke Kenneth Casso... use SPRreduced to match PowerDecoder2 tree | commitdiff
2021-05-01 Luke Kenneth Casso... missing self. tree | commitdiff
2021-05-01 Luke Kenneth Casso... resolve DriverConflict in TstL0CacheBuffer, really... tree | commitdiff
2021-04-30 Luke Kenneth Casso... debug and stop on mmu test_pipe_caller.py tree | commitdiff
2021-04-30 Luke Kenneth Casso... comments on dcache-to-mmu link tree | commitdiff
2021-04-30 Luke Kenneth Casso... add a TestSRAM variant of LoadStore1, for being able... tree | commitdiff
2021-04-30 Luke Kenneth Casso... add basic test_issuer_mmu.py tree | commitdiff
2021-04-30 Luke Kenneth Casso... add option to use new mmu_cache_wb ConfigMemoryPortInte... tree | commitdiff
2021-04-30 Luke Kenneth Casso... hook up dcache wb_in/out to PortInterfaceBase Wishbone... tree | commitdiff
2021-04-30 Luke Kenneth Casso... sort out spblock 4k sram cell instance name to match... tree | commitdiff
2021-04-30 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=635 tree | commitdiff
2021-04-30 Luke Kenneth Casso... better reporting on gpr comparisons tree | commitdiff
2021-04-30 Luke Kenneth Casso... set up LoadStore1 in ConfigMemoryPortInterface and... tree | commitdiff
2021-04-29 Luke Kenneth Casso... comment out adding mmu and dcache to pspec in MMU FSM tree | commitdiff
2021-04-29 Luke Kenneth Casso... move dcache into Loadstore1 tree | commitdiff
2021-04-27 Luke Kenneth Casso... add option to disable bus forwarding on SPRs and FAST... tree | commitdiff
2021-04-27 Luke Kenneth Casso... add option to enable/disable bus forwarding mode on... tree | commitdiff
2021-04-27 Luke Kenneth Casso... return read data out from Loadstore1 only when valid tree | commitdiff
2021-04-26 Luke Kenneth Casso... hook up MSR into MMU (TODO, use a lot less bits) tree | commitdiff
2021-04-26 Luke Kenneth Casso... simple regression dcache test was faulty. wishbone... tree | commitdiff
2021-04-26 Luke Kenneth Casso... comment read ack in sram tree | commitdiff
2021-04-26 Luke Kenneth Casso... incorrect indentation in dcache rams tree | commitdiff
2021-04-26 Luke Kenneth Casso... simplify dcache test tree | commitdiff
2021-04-25 Luke Kenneth Casso... spelling mistake tree | commitdiff
2021-04-25 Luke Kenneth Casso... remove RegStage1.real_adr temporary from dcache tree | commitdiff
2021-04-25 Luke Kenneth Casso... do not overwrite parameter ra in dcache tree | commitdiff
2021-04-25 Luke Kenneth Casso... comment out dcache_store from test, not the problem tree | commitdiff
2021-04-25 Luke Kenneth Casso... remove unneeded code tree | commitdiff
2021-04-25 Luke Kenneth Casso... read req in wb_in.stall, dcache tree | commitdiff
2021-04-25 Cesar StraussShift-out skipped mask bits for both crpred and intpred tree | commitdiff
2021-04-25 Luke Kenneth Casso... add single regression test for dcache tree | commitdiff
2021-04-25 Luke Kenneth Casso... add TODO comment in dcache tree | commitdiff
2021-04-25 Luke Kenneth Casso... move Signals in dcache to relevant context tree | commitdiff
2021-04-25 Luke Kenneth Casso... dcache Elif used where If should have been tree | commitdiff
2021-04-25 Luke Kenneth Casso... whoops should be cyc & ~ack tree | commitdiff
2021-04-25 Luke Kenneth Casso... hard-code dcache stall signal to non-pipelined mode tree | commitdiff
2021-04-24 Luke Kenneth Casso... increase memory size in dcache test tree | commitdiff
2021-04-24 Luke Kenneth Casso... increase size of random dcache testing by 10 tree | commitdiff
2021-04-24 Luke Kenneth Casso... fix errors in dcache unit test tree | commitdiff
2021-04-24 Luke Kenneth Casso... whitespace tree | commitdiff
2021-04-24 Luke Kenneth Casso... remove code moved to openpower-isa repo tree | commitdiff
2021-04-23 Luke Kenneth Casso... add comments on TestIssuer TestRunner tree | commitdiff
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