| 2020-08-13 |
Luke Kenneth Casson... | sync on pc writing when changed
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | sync on reset in compalu
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | add forwarding-bus mode to Regfile Memory (and disable it)
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | sync on port interface address in ld/st compunit, and...
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | another sync to cut latency
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | remove latchregister, sync src oper_i into MultiCompUnit
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | minor tidyup on alu compunit:
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | plenty of time to wait for operand, so use "sync" in...
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | sigh. convert Fast regfile to binary
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | sync on read of regfile ports
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | sigh. convert INT regfile to binary addressing
|
commit | commitdiff | tree |
| 2020-08-13 |
Luke Kenneth Casson... | create a RegFileMem class that uses Memory
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | sigh, remove yet another int regfile read port
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | massive reduction in gate count by using alternative...
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | reduce regfile port usage for INT and FAST
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | prepare write ports to be shared
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | move write regfile picker creation to new function
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | reduce regfile ports by creating separate STATE regfile
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | whoops fix change of variable (state) msr/pc
|
commit | commitdiff | tree |
| 2020-08-11 |
Luke Kenneth Casson... | reducing regfile port usage by sharing read ports
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | stop combinatorial loop in pi2ls
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | write pulse in issuer
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | fix combinatorial loop in ldst compunit
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | use rising edge detection on st go_i/rel_o
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | add logical test issuer case
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | get rid of MSR read combinatorial loop
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | delay go_st by one cycle, break combinatorial loop
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | divwo case makes test_issuer stay busy!
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | add extra divwo regression test
|
commit | commitdiff | tree |
| 2020-08-09 |
Luke Kenneth Casson... | compalu combinatorial loop detected
|
commit | commitdiff | tree |
| 2020-08-06 |
Luke Kenneth Casson... | fix LDST PortInterface FSM interaction
|
commit | commitdiff | tree |
| 2020-08-06 |
Luke Kenneth Casson... | MULS on parameter b needed to check whether it was...
|
commit | commitdiff | tree |
| 2020-08-05 |
Luke Kenneth Casson... | rename ibus/dbus (shorten)
|
commit | commitdiff | tree |
| 2020-08-05 |
Luke Kenneth Casson... | clear sel on loadstore
|
commit | commitdiff | tree |
| 2020-08-05 |
Luke Kenneth Casson... | adding bus data width of 64 in litex sim doesnt work
|
commit | commitdiff | tree |
| 2020-08-05 |
Luke Kenneth Casson... | add div test cases into test_issuer.py
|
commit | commitdiff | tree |
| 2020-08-05 |
Luke Kenneth Casson... | add div FSM as default for test_issuer in verilog and...
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | read/set pc outside of FSM so that DMI interface can...
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | swap over byte-reverse if/else in LDSTCompUnit
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | tracked down byte-reversal in LDST ISACaller and LDSTCompUnit
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | whitespace after autopep8 messed up
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | msr and pc moved to "state" in PowerDecode2
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | whoops must output NIA not PC to debug DMI query in...
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | allow instruction to run if initiated whilst "stopped...
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | cycle through INT regs, read and debug in litex sim
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | add DMI debug interface to libresoc litex sim
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | single-step and print out PC using DMI in litex sim
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | get litex sim to kick off a "STEP" via the DMI interface...
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | connect up a DMI FSM to litex sim
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | more remove wildcard imports
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | do not use wildcard imports
|
commit | commitdiff | tree |
| 2020-08-04 |
Luke Kenneth Casson... | adding litex sim experimentation.
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | add quick demo/test of reading DMI reg 9
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | add extra port for debug read of int regs via DMI
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | pass state (MSR/PC) around between PowerDecode2, DMI...
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | https://bugs.libre-soc.org/show_bug.cgi?id=446
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | use new soc.config.state CoreState class in DMI and...
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | change over to DMI debug start/stop interface
|
commit | commitdiff | tree |
| 2020-08-03 |
Luke Kenneth Casson... | move debug to record
|
commit | commitdiff | tree |
| 2020-08-02 |
Luke Kenneth Casson... | convert microwatt core_debug.vhdl to nmigen
|
commit | commitdiff | tree |
| 2020-08-02 |
Luke Kenneth Casson... | add debug dir
|
commit | commitdiff | tree |
| 2020-08-01 |
Luke Kenneth Casson... | add quick test of litex bios IMM64 macro
|
commit | commitdiff | tree |
| 2020-08-01 |
Luke Kenneth Casson... | add rlwnm test showing that shift rot OP_RLC proof...
|
commit | commitdiff | tree |
| 2020-08-01 |
Luke Kenneth Casson... | line-length / whitespace
|
commit | commitdiff | tree |
| 2020-08-01 |
Luke Kenneth Casson... | expand out for-loop setting up input record subset
|
commit | commitdiff | tree |
| 2020-07-31 |
Luke Kenneth Casson... | reorg DecodeB in power_decoder2.py to sign-extend immediates
|
commit | commitdiff | tree |
| 2020-07-31 |
Luke Kenneth Casson... | add more instructions to litex trampoline test (not...
|
commit | commitdiff | tree |
| 2020-07-31 |
Luke Kenneth Casson... | restrict external port list further in test_issuer
|
commit | commitdiff | tree |
| 2020-07-31 |
Luke Kenneth Casson... | missed go_i/rel_o rename
|
commit | commitdiff | tree |
| 2020-07-30 |
Luke Kenneth Casson... | core_start/stop/endian were inverted (output)
|
commit | commitdiff | tree |
| 2020-07-30 |
Luke Kenneth Casson... | ha! have to explicitly specify the ports when writing...
|
commit | commitdiff | tree |
| 2020-07-30 |
Luke Kenneth Casson... | add trampoline test from litex
|
commit | commitdiff | tree |
| 2020-07-30 |
Luke Kenneth Casson... | set sel line in minerva instruction fetch
|
commit | commitdiff | tree |
| 2020-07-30 |
Luke Kenneth Casson... | ha! found source of XICS test bug: wishbone stb was...
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | more exploratory testing of XICS, joining ICP and ICS...
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | forgot to rename ad/st in LDSTCompUnitRecord
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | bit of a big change: add prefixes "cu_" to all CompUnit...
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | start on test joining XICS ICS to ICP
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | tidyup XICS, identify (potential?) bug?
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | move CR test out of subtest indentation
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | move SHIFTROT test out of subtest indentation
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | move actual ALU test out of subTest indentation just...
|
commit | commitdiff | tree |
| 2020-07-29 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2020-07-28 |
Luke Kenneth Casson... | use ctx.op compare (and muxid) in shiftrot proof
|
commit | commitdiff | tree |
| 2020-07-28 |
Luke Kenneth Casson... | add preliminary investigative test of XICS ICS
|
commit | commitdiff | tree |
| 2020-07-28 |
Luke Kenneth Casson... | tidyup/comments in trap proof
|
commit | commitdiff | tree |
| 2020-07-27 |
Luke Kenneth Casson... | add 2nd part of XICS interrupt interface
|
commit | commitdiff | tree |
| 2020-07-27 |
Luke Kenneth Casson... | fix trap proof, and trap main_stage, and pseudocode...
|
commit | commitdiff | tree |
| 2020-07-27 |
Luke Kenneth Casson... | shorten expected_ to exp_, gets line-length down
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | start on conversion of xics.vhdl to nmigen
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | add nop test cases
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | add test_nop general test case
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | activate some of new accumulator-based tests in test_issuer
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | do not need lod_l.q | lsto_l.q can just use lsd_l.q
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | argh add yet another latch to detect when LD/ST has...
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | sigh, issue with detection/waiting for LD/ST CompUnit
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | convert LDST test to accumulator style
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | convert Branch test to accumulator style
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | convert SPR test to accumulator style
|
commit | commitdiff | tree |
| 2020-07-26 |
Luke Kenneth Casson... | convert TRAP test to accumulator style
|
commit | commitdiff | tree |
| next |
projects / soc.git / search