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add missing ext_irq signal to testissuer in microwatt compat mode
[soc.git] / src / soc / experiment /
2022-01-03 Luke Kenneth Casso... adding an extra option to issuer_verilog.py to be able... tree | commitdiff
2022-01-03 Luke Kenneth Casso... stop display of LDSTCompUnit debug info on every cycle tree | commitdiff
2021-12-30 Luke Kenneth Casso... rename nia to cia in MMU input record and mmu FSM tree | commitdiff
2021-12-28 Luke Kenneth Casso... add misaligned mmu.bin test 5 notes: currently LoadStor... tree | commitdiff
2021-12-27 Luke Kenneth Casso... found bug in mmu with calculating addrsh, should have... tree | commitdiff
2021-12-27 Luke Kenneth Casso... add mmu.py microwatt mmu.bin test4 page table tree | commitdiff
2021-12-26 Luke Kenneth Casso... good grief, finally tracked down a piece of missing... tree | commitdiff
2021-12-26 Luke Kenneth Casso... whoops, using variable RegStage0 in dcache stage_0... tree | commitdiff
2021-12-26 Luke Kenneth Casso... missed reset of d_valid in dcache.py and missed that its tree | commitdiff
2021-12-25 Luke Kenneth Casso... add mmu.bin test2 to much simpler test_loadstore1.py tree | commitdiff
2021-12-25 Luke Kenneth Casso... move msr in test_loadstore1.py outside of conditional... tree | commitdiff
2021-12-25 Luke Kenneth Casso... whitespace tree | commitdiff
2021-12-25 Luke Kenneth Casso... move microwatt mmu.bin test 3 page table to test pageta... tree | commitdiff
2021-12-23 Luke Kenneth Casso... somehow managed to miss out setting r1.forward_valid1... tree | commitdiff
2021-12-23 Luke Kenneth Casso... uniquify names in dcache.py tree | commitdiff
2021-12-22 Luke Kenneth Casso... only use a single variable for ack adjusting in dcache.py tree | commitdiff
2021-12-22 Luke Kenneth Casso... ooo far too late at night to be doing this tree | commitdiff
2021-12-22 Luke Kenneth Casso... whoops use C not Const tree | commitdiff
2021-12-22 Luke Kenneth Casso... whoops use C not Const tree | commitdiff
2021-12-22 Luke Kenneth Casso... remove bus_ack (found bug in Simulation, sorted) tree | commitdiff
2021-12-22 Luke Kenneth Casso... bug in mmu setting radix tree size with one extra bit tree | commitdiff
2021-12-21 Luke Kenneth Casso... mmu code-comments tree | commitdiff
2021-12-21 Luke Kenneth Casso... comments tree | commitdiff
2021-12-21 Luke Kenneth Casso... use prtbl in proc_tbl_wait in mmu tree | commitdiff
2021-12-21 Luke Kenneth Casso... mmu.py comments tree | commitdiff
2021-12-20 Luke Kenneth Casso... more code-comments tree | commitdiff
2021-12-20 Luke Kenneth Casso... code-comments in MMU tree | commitdiff
2021-12-20 Luke Kenneth Casso... prefer not to invert when doing if/else. tree | commitdiff
2021-12-20 Luke Kenneth Casso... more code-comments tree | commitdiff
2021-12-20 Luke Kenneth Casso... add RTPDE - Radit Tree Page Directory Entry - Record... tree | commitdiff
2021-12-20 Luke Kenneth Casso... add (and ues) PRTBL Record in MMU tree | commitdiff
2021-12-20 Luke Kenneth Casso... create PGTBL Record and use it in MMU page_table_idle tree | commitdiff
2021-12-18 Luke Kenneth Casso... sort out reset signalling after tracking down Simulatio... tree | commitdiff
2021-12-18 Luke Kenneth Casso... add icache/dcache/mmu unit test for TestIssuer tree | commitdiff
2021-12-18 Luke Kenneth Casso... move connection of bus.stall in icache.py, tree | commitdiff
2021-12-18 Luke Kenneth Casso... tidyup tree | commitdiff
2021-12-18 Luke Kenneth Casso... tlb_req_index is TLB_BITS long not TLB_SIZE tree | commitdiff
2021-12-16 Luke Kenneth Casso... whoops, a Simulation bug, dcache bus ack Signal needed... tree | commitdiff
2021-12-16 Luke Kenneth Casso... give names to MMU records tree | commitdiff
2021-12-16 Luke Kenneth Casso... set_mmu_spr was using the slow-SPR index for the regfile tree | commitdiff
2021-12-14 Tobias Platentest_loadstore1.py: test_loadstore1_ifetch_multi now... tree | commitdiff
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() in test_loadstore1.py tree | commitdiff
2021-12-14 Tobias Platenwip test case for virtual address fetch using fetch... tree | commitdiff
2021-12-14 Tobias Platenfix test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-13 Tobias Platentry to get multi test running tree | commitdiff
2021-12-13 Tobias Platencomments about test_loadstore1_ifetch() tree | commitdiff
2021-12-13 Luke Kenneth Casso... fix test_loadstore1.py with MSR=PR/DR tree | commitdiff
2021-12-13 Luke Kenneth Casso... set pr=0 because privileged mode is pr=0 not pr=1 tree | commitdiff
2021-12-13 Luke Kenneth Casso... add in missing MSRSpec import tree | commitdiff
2021-12-13 Luke Kenneth Casso... commented-out code tree | commitdiff
2021-12-13 Tobias Platenupdate MMU PortInterface Test (misalign) tree | commitdiff
2021-12-13 Tobias Platencleanup test_ldst_pi.py tree | commitdiff
2021-12-13 Tobias Platenupdate old TestMicrowattMemoryPortInterface tree | commitdiff
2021-12-13 Tobias Platenreplace msr_pr with msr tree | commitdiff
2021-12-13 Tobias Platencleanup test_dcbz_pi.py tree | commitdiff
2021-12-13 Luke Kenneth Casso... fix up pr/dr/sf in PortInterfaceBase tree | commitdiff
2021-12-13 Luke Kenneth Casso... pass in new MSRSpec to test_loadstore1.py not msr_pr=1 tree | commitdiff
2021-12-13 Luke Kenneth Casso... convert PortInterfaceBase to pass msr not msr_pr tree | commitdiff
2021-12-13 Luke Kenneth Casso... still have to import MSRSpec tree | commitdiff
2021-12-13 Luke Kenneth Casso... connect up PortInterface priv_mode, virt_mode and mode_... tree | commitdiff
2021-12-13 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-12-13 Luke Kenneth Casso... construct an MSRSpec in PortInterfaceBase (not used... tree | commitdiff
2021-12-13 Tobias Platenremove redundant MSRSpec from pimem tree | commitdiff
2021-12-13 Luke Kenneth Casso... whoops wrong variable names tree | commitdiff
2021-12-13 Luke Kenneth Casso... rename msr_pr to priv_mode in LDSTCompUnit tree | commitdiff
2021-12-13 Luke Kenneth Casso... TODO comments about using MSRspec tree | commitdiff
2021-12-13 Luke Kenneth Casso... change PortInterface naming to msr not msr_pr in set_wr... tree | commitdiff
2021-12-13 Tobias Platenadd namedtuple proposed by lkcl in chat tree | commitdiff
2021-12-13 Tobias Platenadd signals to port interface as descibed in bug 756 tree | commitdiff
2021-12-13 Tobias Platenmore work on test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-12 Luke Kenneth Casso... in a terrible botched way, get at I-Cache and set it up tree | commitdiff
2021-12-11 Luke Kenneth Casso... fix bug in unit test, forgot that wb_get mem dict is... tree | commitdiff
2021-12-11 Luke Kenneth Casso... get FetchUnitInterface I-Cache test working (sort-of) tree | commitdiff
2021-12-11 Luke Kenneth Casso... comment out broken test tree | commitdiff
2021-12-11 Tobias Platentypo fix, add missing stop statement to _test_loadstore... tree | commitdiff
2021-12-11 Tobias Platenadd loop with multiple instructions for testing tree | commitdiff
2021-12-11 Tobias Platenadd skeleton for test_loadstore1_ifetch_multi() tree | commitdiff
2021-12-11 Luke Kenneth Casso... add start of test_loadstore1_ifetch_unit_interface() tree | commitdiff
2021-12-11 Luke Kenneth Casso... connect up I-Cache to FetchUnitInterface tree | commitdiff
2021-12-10 Tobias Platenuse icache_read in one place tree | commitdiff
2021-12-10 Tobias Platentest_loadstore1.py: begin code deduplication tree | commitdiff
2021-12-09 Luke Kenneth Casso... add some examination of the failed-fetched instruction tree | commitdiff
2021-12-09 Luke Kenneth Casso... add some debug string info to gtkwave tree | commitdiff
2021-12-09 Tobias Platenimplement main part of test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-09 Tobias Platencleanup test_loadstore1.py tree | commitdiff
2021-12-09 Jacob Lifshayadd parent_pspec everywhere tree | commitdiff
2021-12-09 Jacob Lifshayformat code tree | commitdiff
2021-12-08 Luke Kenneth Casso... got fed up of staring at magic constants in the MMU tree | commitdiff
2021-12-08 Luke Kenneth Casso... add special pagetable to ifetch_invalid with execute... tree | commitdiff
2021-12-08 Luke Kenneth Casso... do not try priv_mode on the instruction fetch (not... tree | commitdiff
2021-12-08 Luke Kenneth Casso... add an example pagetable where executable permission... tree | commitdiff
2021-12-08 Tobias Platenbegin working on _test_loadstore1_ifetch_invalid()... tree | commitdiff
2021-12-08 Tobias Platenmore work on test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-12-08 Tobias Platenadd skeleton for test_loadstore1_ifetch_invalid() tree | commitdiff
2021-12-08 Luke Kenneth Casso... check that no exception occurs in the virtual-memory... tree | commitdiff
2021-12-08 Luke Kenneth Casso... make LoadStore1 intsr_fault a "captured flag" - strictl... tree | commitdiff
2021-12-08 Luke Kenneth Casso... add instr_fault to LoadStore1 FSM tree | commitdiff
2021-12-08 Luke Kenneth Casso... add new PortInterfaceBase external_busy() option tree | commitdiff
2021-12-07 Luke Kenneth Casso... complete the i-cache fetch through the MMU, including... tree | commitdiff
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