2021-09-21 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2021-09-21 |
Tobias Platen | comment out lines that cause test_compldst_multi_mmu... |
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2021-09-20 |
Tobias Platen | update test_compldst_multi_mmu.py |
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2021-09-19 |
Cesar Strauss | Replace "Display" with "print" on simulation process |
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2021-09-15 |
isengaara | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2021-09-15 |
isengaara | add new testcase for ompldst_multi using mmu |
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2021-08-24 |
Luke Kenneth Casso... | replace data_o with o_data and data_i with i_data as... |
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2021-08-24 |
Luke Kenneth Casso... | big rename, global/search/replace of ready_o with o_rea... |
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2021-08-17 |
Tobias Platen | fix "link addr-go direct to rel" |
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2021-08-17 |
Cesar Strauss | Clear operand latch on a terminating condition |
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2021-08-17 |
Cesar Strauss | Add exc_o.happened to the conditions for terminating... |
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2021-08-17 |
Cesar Strauss | Fix activation of cancel signal |
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2021-08-16 |
Tobias Platen | fix renamed symbols |
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2021-08-01 |
Jonathan Neuschäfer | Rename test_dcache, which can't be invoked by test... |
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2021-07-31 |
Tobias Platen | partial fix for src/soc/experiment/compldst_multi.py |
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2021-07-30 |
Tobias Platen | partially fix unit test in compldst_multi.py |
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2021-07-26 |
Tobias Platen | compldst_multi: add debug output for dcbz |
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2021-07-23 |
Tobias Platen | test_dcbz_pi.py: dcbz now working |
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2021-07-21 |
Tobias Platen | test_dcbz_pi.py: do not use problem state |
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2021-07-19 |
Tobias Platen | test_dcbz_pi.py: more work on unit test |
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2021-07-14 |
Tobias Platen | add more debug outputs, pass dcbz to loadstore/dcache |
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2021-07-14 |
Tobias Platen | dcache: improve debug output |
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2021-07-11 |
Tobias Platen | more work on test_dcbz_pi.py |
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2021-07-11 |
Tobias Platen | implement pi_dcbz |
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2021-07-11 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2021-07-11 |
Tobias Platen | add test_dcbz_pi.py (skeleton only) |
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2021-07-10 |
Cesar Strauss | Add new traces to the GTKWave document |
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2021-07-10 |
Cesar Strauss | Add operand producers to the parallel LDST Compunit... |
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2021-07-10 |
Cesar Strauss | Detect unexpected operand fetches and produced results |
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2021-07-07 |
Cesar Strauss | Start of a GTKWave document for the LDST CompUnit paral... |
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2021-07-04 |
Cesar Strauss | Beginning of a class to make a parallel test case for... |
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2021-06-30 |
Tobias Platen | cut down on time by uncommenting data not needed, addin... |
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2021-06-28 |
Tobias Platen | update ldst test case by adding precise timing |
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2021-06-20 |
Tobias Platen | dcache: add debug output |
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2021-06-20 |
Tobias Platen | update test_ldst_pi.py |
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2021-06-18 |
Tobias Platen | uncomment test_dcache_random |
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2021-06-14 |
Tobias Platen | update testcase for ldst |
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2021-06-06 |
Cesar Strauss | Start a new self-contained test suite for LDSTCompUnit |
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2021-06-01 |
Tobias Platen | test_ldst_pi.py: add new test case |
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2021-05-29 |
Tobias Platen | test_ldst_pi.py: first version of test_dcache_random() |
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2021-05-29 |
Tobias Platen | test_ldst_pi.py: more test_dcache_regression() |
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2021-05-26 |
Luke Kenneth Casso... | add ldst PortInterface misalign unit test (underway) |
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2021-05-25 |
Tobias Platen | test_ldst_pi.py: fix race condition causing early stop |
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2021-05-15 |
Tobias Platen | test_ldst_pi.py: add dcache regression and random test... |
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2021-05-14 |
Luke Kenneth Casso... | add radix MMU "miss" test |
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2021-05-14 |
Luke Kenneth Casso... | sort out LoadStore1 misalignment FSM, also required... |
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2021-05-14 |
Luke Kenneth Casso... | add misaligned load through MMU (which is incorrectly... |
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2021-05-13 |
Luke Kenneth Casso... | minor rework of wb_get, make generic |
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2021-05-13 |
Luke Kenneth Casso... | added STORE test in test_ldst_pi.py, and it worked... |
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2021-05-13 |
Luke Kenneth Casso... | yet more debug log stuff for DCache, this time on Cache... |
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2021-05-13 |
Luke Kenneth Casso... | fix wb_get error where data was being corrupted |
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2021-05-13 |
Luke Kenneth Casso... | add read at different locations in test_ldst_pi.py |
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2021-05-13 |
Luke Kenneth Casso... | add some data for MMU to actually look up |
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2021-05-13 |
Luke Kenneth Casso... | ha, hilarious: swapped TLBUpdate output sizes db_out... |
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2021-05-13 |
Luke Kenneth Casso... | whoops TLBIE must *clear* the valid bit not set it... |
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2021-05-13 |
Luke Kenneth Casso... | more debug Display in dcache.py |
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2021-05-13 |
Luke Kenneth Casso... | putting in a lot more debug print statements in DCache... |
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2021-05-12 |
Luke Kenneth Casso... | add dcache tlb / pte test |
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2021-05-12 |
Luke Kenneth Casso... | move dcache unit test to separate test_dcache.py |
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2021-05-12 |
Luke Kenneth Casso... | experimentation with MMU-enabled LoadStore1 through... |
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2021-05-12 |
Luke Kenneth Casso... | add debug info, update comments, disable dcache in... |
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2021-05-12 |
Luke Kenneth Casso... | start doing virtual memory queries via PortInterface... |
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2021-05-12 |
Luke Kenneth Casso... | whoops missing default zero (no idea how) |
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2021-05-12 |
Luke Kenneth Casso... | addcomments for MMU PortInterface test (how it, um... |
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2021-05-12 |
Luke Kenneth Casso... | bit of a hack to get test_mmu_dcache_pi.py operational. |
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2021-05-12 |
Luke Kenneth Casso... | whitespace |
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2021-05-12 |
Luke Kenneth Casso... | no need for sel0 |
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2021-05-11 |
Luke Kenneth Casso... | pass through MSR.PR through PortInterface, into LoadStore1 |
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2021-05-11 |
Luke Kenneth Casso... | connect MSR.PR to PortInterface in LDSTCompUnit |
tree | commitdiff |
2021-05-11 |
Luke Kenneth Casso... | add msr_pr bit in PortInterface |
tree | commitdiff |
2021-05-10 |
Luke Kenneth Casso... | whoops, indentation issue on m.If/m.Else in dcache.py |
tree | commitdiff |
2021-05-10 |
Luke Kenneth Casso... | add links to set associative image, and bugreport |
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2021-05-09 |
Luke Kenneth Casso... | update code-comments |
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2021-05-09 |
Luke Kenneth Casso... | add misalign flag to PortInterfaceBase |
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2021-05-04 |
Luke Kenneth Casso... | more rename of exception_o to exc_o, add convenience... |
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2021-05-04 |
Luke Kenneth Casso... | wire in exc_o.happened into write-cancellation of LDSTC... |
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2021-05-04 |
Luke Kenneth Casso... | comments, and change name of LDSTCompUnit exception_o... |
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2021-05-04 |
Luke Kenneth Casso... | code-comments for LDSTCompUnit |
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2021-05-02 |
Luke Kenneth Casso... | add nc argument to dcache load/store tests |
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2021-05-02 |
Luke Kenneth Casso... | quick hack to SRAM test and to dcache to enable classic... |
tree | commitdiff |
2021-05-01 |
Luke Kenneth Casso... | dcache store test: data goes in one cycle AFTER valid... |
tree | commitdiff |
2021-05-01 |
Cesar Strauss | Add GTKWave documents to each DCache unit test |
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2021-05-01 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2021-05-01 |
Luke Kenneth Casso... | missing self. |
tree | commitdiff |
2021-05-01 |
Luke Kenneth Casso... | resolve DriverConflict in TstL0CacheBuffer, really... |
tree | commitdiff |
2021-04-26 |
Luke Kenneth Casso... | simple regression dcache test was faulty. wishbone... |
tree | commitdiff |
2021-04-26 |
Luke Kenneth Casso... | incorrect indentation in dcache rams |
tree | commitdiff |
2021-04-26 |
Luke Kenneth Casso... | simplify dcache test |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | spelling mistake |
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2021-04-25 |
Luke Kenneth Casso... | remove RegStage1.real_adr temporary from dcache |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | do not overwrite parameter ra in dcache |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | comment out dcache_store from test, not the problem |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | remove unneeded code |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | read req in wb_in.stall, dcache |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | add single regression test for dcache |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | add TODO comment in dcache |
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2021-04-25 |
Luke Kenneth Casso... | move Signals in dcache to relevant context |
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2021-04-25 |
Luke Kenneth Casso... | dcache Elif used where If should have been |
tree | commitdiff |
2021-04-25 |
Luke Kenneth Casso... | whoops should be cyc & ~ack |
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2021-04-25 |
Luke Kenneth Casso... | hard-code dcache stall signal to non-pipelined mode |
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