Add a vector case with VL == 0
[soc.git] / src / soc / fu / alu / test / svp64_cases.py
2021-02-26 Cesar StraussAdd a vector case with VL == 0
2021-02-17 Cesar StraussAdd a case for checking the EXTRA field and register...
2021-02-15 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2021-02-13 Cesar StraussSkip vector test case, and add a scalar case
2021-02-13 Cesar StraussFix imports and whitespace
2021-02-13 Luke Kenneth Casso... add SVP64 TestIssuer separate unit test