projects / soc.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
add in predicate mask bit detection when zeroing is enabled
[soc.git] / src / soc / simple / test /
2021-05-06 Luke Kenneth Casso... add in predicate mask bit detection when zeroing is... tree | commitdiff
2021-05-06 Luke Kenneth Casso... moved exts* SVP64 unit tests to a different location tree | commitdiff
2021-05-04 Luke Kenneth Casso... whoops disabled some test_issuer group tests tree | commitdiff
2021-05-04 Luke Kenneth Casso... code-comments for LDSTCompUnit tree | commitdiff
2021-05-01 Luke Kenneth Casso... send a DMI RESET at the end of the test. tree | commitdiff
2021-05-01 Luke Kenneth Casso... store data in microwatt dcache goes in one cycle AFTER... tree | commitdiff
2021-05-01 Luke Kenneth Casso... add LD/ST cases to MMU, which should all still work tree | commitdiff
2021-05-01 Luke Kenneth Casso... add MMUTestCaseROM tree | commitdiff
2021-05-01 Luke Kenneth Casso... use new AllFunctionUnits.get_fu function tree | commitdiff
2021-05-01 Luke Kenneth Casso... use SPRreduced to match PowerDecoder2 tree | commitdiff
2021-04-30 Luke Kenneth Casso... add a TestSRAM variant of LoadStore1, for being able... tree | commitdiff
2021-04-30 Luke Kenneth Casso... add basic test_issuer_mmu.py tree | commitdiff
2021-04-30 Luke Kenneth Casso... add option to use new mmu_cache_wb ConfigMemoryPortInte... tree | commitdiff
2021-04-30 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=635 tree | commitdiff
2021-04-30 Luke Kenneth Casso... better reporting on gpr comparisons tree | commitdiff
2021-04-23 Luke Kenneth Casso... add comments on TestIssuer TestRunner tree | commitdiff
2021-04-23 Luke Kenneth Casso... comment tests back in tree | commitdiff
2021-04-23 Luke Kenneth Casso... error in setting fast regs test values tree | commitdiff
2021-04-23 Luke Kenneth Casso... import from openpower.tests tree | commitdiff
2021-04-23 Luke Kenneth Casso... use openpower.test.common tree | commitdiff
2021-04-23 Luke Kenneth Casso... move more files to openpower-isa tree | commitdiff
2021-04-23 Luke Kenneth Casso... correct migration of openpower-isa tree | commitdiff
2021-04-23 Luke Kenneth Casso... move over to from openpower imports tree | commitdiff
2021-04-21 Tobias Platentestcase: pass PRTBL to mmu tree | commitdiff
2021-04-03 Cesar StraussAllow the Simulator to handle back-to-back signaling... tree | commitdiff
2021-03-30 Alain D D WilliamsMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2021-03-30 Luke Kenneth Casso... use port name for INT regfile to match up with test_run... tree | commitdiff
2021-03-30 Cesar StraussMemory port seems to have been renamed tree | commitdiff
2021-03-28 Luke Kenneth Casso... rather invasive reduction of SPR regfile size tree | commitdiff
2021-03-28 Luke Kenneth Casso... reduce number of regfile ports tree | commitdiff
2021-03-22 Cesar StraussAdd traces for the new FSM and integer predicate decoding tree | commitdiff
2021-03-09 Cesar StraussAdd some extra debug traces to the GTKWave document tree | commitdiff
2021-03-09 Cesar StraussCreate a new signal for the Simulator to wait on tree | commitdiff
2021-03-08 Luke Kenneth Casso... actually make it possible to disable svp64 on commandli... tree | commitdiff
2021-03-08 Luke Kenneth Casso... add option in TestRunner to disable svp64 via commandli... tree | commitdiff
2021-03-03 Luke Kenneth Casso... set SVSTATE in TestRunner using new TestIssuer.svstate_i tree | commitdiff
2021-03-03 Luke Kenneth Casso... add svstate_i to TestIssuer which mirrors pc_i tree | commitdiff
2021-03-02 Luke Kenneth Casso... sort out SPR setting in MMU tree | commitdiff
2021-02-27 Cesar StraussAdd traces for the new FSM tree | commitdiff
2021-02-24 Tobias Platentest_runner.py: add needed imports tree | commitdiff
2021-02-23 Tobias Platendeduplicate tree | commitdiff
2021-02-22 Luke Kenneth Casso... whoops tree | commitdiff
2021-02-22 Luke Kenneth Casso... moving PC-setting (NIA) out of execute_fsm in TestIssuer tree | commitdiff
2021-02-21 Cesar StraussHide the register augmentation traces by default tree | commitdiff
2021-02-21 Luke Kenneth Casso... move fetch_fsm to separate function in TestIssuer tree | commitdiff
2021-02-21 Luke Kenneth Casso... add JTAG enable/disable of 4k SRAMs tree | commitdiff
2021-02-20 Luke Kenneth Casso... whoops set ROM to none by mistake tree | commitdiff
2021-02-20 Luke Kenneth Casso... remove massive code-duplication, move simple "self... tree | commitdiff
2021-02-20 Tobias Platenadd rom debugger tree | commitdiff
2021-02-20 Tobias Platenadd mmu rom testcase tree | commitdiff
2021-02-17 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-02-17 Tobias Platenadd wishbone signals to gtkwave output tree | commitdiff
2021-02-17 Cesar StraussAdd the SVSTATE traces to GTKWave to allow debugging... tree | commitdiff
2021-02-17 Cesar StraussInitialize the core SVSTATE from the corresponding... tree | commitdiff
2021-02-17 Cesar StraussRevert "Setup SVSTATE, from the test settings, at the... tree | commitdiff
2021-02-17 Cesar StraussAdd traces to debug SVP64 prefix decoding issues tree | commitdiff
2021-02-17 Cesar StraussSetup SVSTATE, from the test settings, at the start tree | commitdiff
2021-02-16 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-02-15 Tobias Platentest case for MMU SPRs: PID and PRTBL tree | commitdiff
2021-02-15 Cesar StraussSimplify obtaining the PC from the register file tree | commitdiff
2021-02-15 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-02-14 Cesar StraussShow traces for the register numbers of the current... tree | commitdiff
2021-02-14 Luke Kenneth Casso... add TestRunner comments tree | commitdiff
2021-02-13 Cesar StraussCheck the PC value at the end of each instruction tree | commitdiff
2021-02-13 Luke Kenneth Casso... add SVP64 TestIssuer separate unit test tree | commitdiff
2021-02-13 Luke Kenneth Casso... split out TestRunner into separate module tree | commitdiff
2021-02-12 Luke Kenneth Casso... add SVSTATE to TestCase infrastructure for use in TestI... tree | commitdiff
2021-02-06 Cesar StraussFix whitespace tree | commitdiff
2021-02-06 Cesar StraussExtract the fetch FSM out from the main FSM tree | commitdiff
2021-02-04 Tobias Platensrc/soc/fu/mmu/fsm.py: add debug outputs for gtkwave tree | commitdiff
2021-02-01 Tobias Platenextending the GTKWave document in test_issuer when... tree | commitdiff
2021-02-01 Cesar StraussAdd GTKWave document to test_issuer tree | commitdiff
2021-01-18 Tobias Platenuncomment #FIXME in unit_test tree | commitdiff
2021-01-16 Tobias Platenmove microwatt_mmu bool variable to pspec tree | commitdiff
2021-01-08 Tobias Platenfix broken testcase for simple core tree | commitdiff
2020-10-16 Luke Kenneth Casso... re-enable tests tree | commitdiff
2020-10-16 Luke Kenneth Casso... manually run coresync clock for test issuer tree | commitdiff
2020-10-16 Luke Kenneth Casso... set defaults in pspec tree | commitdiff
2020-10-01 Luke Kenneth Casso... create dummy PLL block, connect up to core and clock... tree | commitdiff
2020-09-26 Cesar StraussConvert a few more tests to be able to use cxxsim tree | commitdiff
2020-09-24 Cesar StraussUse nmutil simulator module to simplify choosing among... tree | commitdiff
2020-09-08 Luke Kenneth Casso... add cxxsim option tree | commitdiff
2020-08-30 Luke Kenneth Casso... reversal of FXM mask for one-hot selection in OP_MTCR... tree | commitdiff
2020-08-29 Luke Kenneth Casso... add hack to get at XER through DMI interface tree | commitdiff
2020-08-27 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-27 Luke Kenneth Casso... overflow-enable does not occur on shift operations tree | commitdiff
2020-08-25 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-25 Luke Kenneth Casso... add CR read to DMI interface tree | commitdiff
2020-08-24 Luke Kenneth Casso... add isel CR tests to run on qemu (confirmed working) tree | commitdiff
2020-08-21 Luke Kenneth Casso... get litex sim enabled with 32-bit wishbone bus tree | commitdiff
2020-08-16 Luke Kenneth Casso... attempting to track down bug in litex bios memtest tree | commitdiff
2020-08-15 Luke Kenneth Casso... rather big change to interaction between regfile and... tree | commitdiff
2020-08-14 Luke Kenneth Casso... sync up the core decode-execute state, tree | commitdiff
2020-08-14 Luke Kenneth Casso... move instruction decoder out of core tree | commitdiff
2020-08-14 Luke Kenneth Casso... sort out instruction stop/cancel when adding a new... tree | commitdiff
2020-08-13 Luke Kenneth Casso... sigh. convert INT regfile to binary addressing tree | commitdiff
2020-08-09 Luke Kenneth Casso... add logical test issuer case tree | commitdiff
2020-08-05 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-05 Luke Kenneth Casso... add div test cases into test_issuer.py tree | commitdiff
2020-08-03 Luke Kenneth Casso... add quick demo/test of reading DMI reg 9 tree | commitdiff
next