2021-02-12 |
Luke Kenneth Casso... | add skip of instruction if SVSTATE.VL=0 in ISACaller |
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2021-02-12 |
Luke Kenneth Casso... | validate all registers to make sure no damage occurs... |
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2021-02-12 |
Luke Kenneth Casso... | add srcstep and correct PC-advancing during Sub-PC... |
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2021-02-12 |
Luke Kenneth Casso... | comments |
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2021-02-12 |
Luke Kenneth Casso... | add in SVSTATE.srcstep update, loop from 0 to VL-1 |
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2021-02-12 |
Luke Kenneth Casso... | allow PC to update by 8 in SVP64 mode |
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2021-02-12 |
Luke Kenneth Casso... | fix setting of SVSTATE.VL and MVL |
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2021-02-12 |
Luke Kenneth Casso... | add in SVSTATE to ISACaller, not used, just passed in |
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2021-02-11 |
Luke Kenneth Casso... | comments in TestIssuer for SVP64PrefixDecoder |
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2021-02-10 |
Luke Kenneth Casso... | add svp64 reg decode detection to ISACaller output |
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2021-02-10 |
Luke Kenneth Casso... | starting to add SVP64 register EXTRA-read and isvec... |
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2021-02-10 |
Luke Kenneth Casso... | comment update |
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2021-02-09 |
colepoirier | add missing newline at end of experiment/formal/.gitignore |
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2021-02-09 |
colepoirier | fix erroneous removal of proof* from experiment/formal... |
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2021-02-07 |
colepoirier | add skeleton implementation of experiment/formal/proof_... |
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2021-02-07 |
colepoirier | icache.py fix formatting |
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2021-02-07 |
colepoirier | Modify experiment/formal/.gitignore because was prevent... |
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2021-02-06 |
Cesar Strauss | Fix whitespace |
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2021-02-06 |
Cesar Strauss | Extract the fetch FSM out from the main FSM |
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2021-02-05 |
Tobias Platen | fix hanging simulation |
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2021-02-04 |
Tobias Platen | src/soc/fu/mmu/fsm.py: add debug outputs for gtkwave |
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2021-02-04 |
Tobias Platen | update test_issuer_mmu_data_path.py to handle SPRs |
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2021-02-04 |
Tobias Platen | pass SPR MicroOp to MMU function unit |
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2021-02-03 |
Luke Kenneth Casso... | nope - need it to be zero if not identified as svp64 |
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2021-02-03 |
Luke Kenneth Casso... | actually no need to mux in the svp64_rm, just the id... |
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2021-02-03 |
Luke Kenneth Casso... | add SVP64PowerDecoder, extracts svp64 remap if correctl... |
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2021-02-01 |
Luke Kenneth Casso... | ISACaller, in svp64 mode, read the next 32 bits when... |
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2021-02-01 |
Tobias Platen | extending the GTKWave document in test_issuer when... |
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2021-02-01 |
Luke Kenneth Casso... | sort out SelectableInt bit-ordering for identifying... |
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2021-02-01 |
Luke Kenneth Casso... | construct the assembly-code prefix and base v3.0B in... |
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2021-02-01 |
Cesar Strauss | Add GTKWave document to test_issuer |
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2021-01-31 |
Cesar Strauss | Fix loop test and enable it |
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2021-01-31 |
Luke Kenneth Casso... | start an ISACaller SVP64 unit test |
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2021-01-31 |
Luke Kenneth Casso... | test SVP64 major opcode, start checking if it is EXT001... |
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2021-01-31 |
Luke Kenneth Casso... | adjusting ISACaller unit test to use ISACaller.setup_one() |
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2021-01-31 |
Luke Kenneth Casso... | fix ISACaller unit test |
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2021-01-31 |
Tobias Platen | fix two syntax errors in src/soc/decoder/isa/caller.py |
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2021-01-31 |
Luke Kenneth Casso... | SVP64 Remap Fields structures for ISACaller |
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2021-01-31 |
Luke Kenneth Casso... | remove sv_rm from PowerDecoder register decoders |
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2021-01-31 |
Luke Kenneth Casso... | add SVSTATE SPR sub-field accessor class to ISACaller |
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2021-01-31 |
Luke Kenneth Casso... | move SVP64 Extra reg decoding into main PowerDecoder... |
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2021-01-31 |
Luke Kenneth Casso... | update submodule |
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2021-01-30 |
Luke Kenneth Casso... | move CR in/out SVP64 EXTRA decoders into PowerDecoder |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 CR out extending to 7-bit in PowerDecoder2 |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 CR EXTRA field-extension, from 3-bit to 7... |
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2021-01-30 |
Luke Kenneth Casso... | extend CR registers in Decode2ToExecute1Type to 7 bit |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64CRExtra class to PowerDecoder2, turns 3-bit... |
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2021-01-30 |
Luke Kenneth Casso... | split out SVEXTRA field selection/decoding into separat... |
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2021-01-30 |
Luke Kenneth Casso... | whoops update PowerDecoder2 svp64 comments, reg sizes... |
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2021-01-30 |
Luke Kenneth Casso... | add SVP64 EXTRA decoding to RB, RC and RT (out) in... |
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2021-01-30 |
Luke Kenneth Casso... | add first SVP64 7-bit register context decoder to Power... |
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2021-01-29 |
Luke Kenneth Casso... | add SVP64RM record to PowerDecoder2 |
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2021-01-29 |
Luke Kenneth Casso... | increase register number sizes from 5 to 7 |
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2021-01-29 |
Luke Kenneth Casso... | syntax corrections, also size of maxvl was wrong |
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2021-01-29 |
Luke Kenneth Casso... | add SVP64 RM (Remap) Record |
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2021-01-29 |
Luke Kenneth Casso... | adjust SVP64RM class to output more PowerDecoder-friend... |
tree | commitdiff |
2021-01-29 |
Luke Kenneth Casso... | adjust how register copy/setup is done in PowerDecoder2 |
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2021-01-29 |
Luke Kenneth Casso... | add SV etype/ptype to power decoder |
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2021-01-29 |
Luke Kenneth Casso... | whoops syntax error. submodule update |
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2021-01-29 |
Luke Kenneth Casso... | start adding svp64 enums |
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2021-01-29 |
Luke Kenneth Casso... | use new svp64-augmented csv reader in PowerDecoder |
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2021-01-29 |
Luke Kenneth Casso... | whoops missed out "+" on explicit license listing |
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2021-01-28 |
Luke Kenneth Casso... | add SVSTATE to StateRegs |
tree | commitdiff |
2021-01-28 |
Luke Kenneth Casso... | add SVState SPR Record, SVSTATERec |
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2021-01-28 |
Luke Kenneth Casso... | add svp64 CR field identification for EXTRA2/3 decoding |
tree | commitdiff |
2021-01-28 |
Luke Kenneth Casso... | move svp64 reg-decode function to more appropriate... |
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2021-01-28 |
Luke Kenneth Casso... | provide "merger" of SVP64 RM info into v3.0B CSV files |
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2021-01-27 |
Tobias Platen | use SPR constants |
tree | commitdiff |
2021-01-27 |
Luke Kenneth Casso... | move SVP64RM CSV class to new module |
tree | commitdiff |
2021-01-27 |
Luke Kenneth Casso... | whitespace and shortening of SPR MMU redirection in... |
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2021-01-27 |
Luke Kenneth Casso... | also read LDST RM files |
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2021-01-26 |
Tobias Platen | [Bug 580] update comment above changed block |
tree | commitdiff |
2021-01-26 |
Tobias Platen | [Bug 580] redirect MMU SPRs to the MMU |
tree | commitdiff |
2021-01-25 |
Luke Kenneth Casso... | extra comments in svp64 |
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2021-01-24 |
Luke Kenneth Casso... | changing svp64 asm syntax to use / instead of . as... 24jan2021_ls180 |
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2021-01-23 |
Luke Kenneth Casso... | move sanity-checks, add mode into svp64_rm |
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2021-01-23 |
Luke Kenneth Casso... | cleanup on aisle 3 - simplify sv_mode svp64 |
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2021-01-23 |
Luke Kenneth Casso... | check src/dest mask exist if zeroing, svp64 |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | add predicate-result svp64 decoding |
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2021-01-23 |
Luke Kenneth Casso... | add svp64 saturation decoding |
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2021-01-23 |
Luke Kenneth Casso... | start decoding modes in svp64 |
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2021-01-23 |
Luke Kenneth Casso... | and now for something completely different... |
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2021-01-23 |
Luke Kenneth Casso... | add elwidth encoding svp64, add more debug-print |
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2021-01-23 |
Luke Kenneth Casso... | add svp64 subvl encoding |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | add in svp64 predicate mask encoding |
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2021-01-23 |
Luke Kenneth Casso... | capture CR 3 and 5 bit sv encodings |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | start decoding EXTRA2/3 |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | start decoding sv EXTRAs and identifying them |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | start to read RM CSV files |
tree | commitdiff |
2021-01-23 |
Luke Kenneth Casso... | add beginnings of svp64 assembly translator |
tree | commitdiff |
2021-01-22 |
Luke Kenneth Casso... | add example on how to access regs list for cmp |
tree | commitdiff |
2021-01-19 |
Tobias Platen | test_issuer_mmu_data_path.py: test both ld and st instr... |
tree | commitdiff |
2021-01-19 |
Tobias Platen | connect LDSTException to MMU and DCache |
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2021-01-19 |
Tobias Platen | connect wishbone bus to test memory |
tree | commitdiff |
2021-01-18 |
Tobias Platen | uncomment #FIXME in unit_test |
tree | commitdiff |
2021-01-18 |
Tobias Platen | fu/mmu/fsm.py: connect valid and load signals |
tree | commitdiff |
2021-01-17 |
Tobias Platen | add test memory for simulation |
tree | commitdiff |
2021-01-17 |
Tobias Platen | cleanup test_issuer_mmu_data_path.py |
tree | commitdiff |
2021-01-16 |
Tobias Platen | clean up test case for tlbie and dcbz |
tree | commitdiff |
2021-01-16 |
Tobias Platen | move microwatt_mmu bool variable to pspec |
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