2020-10-15 |
Luke Kenneth Casso... | disable gpio in litex core |
tree | commitdiff |
2020-10-15 |
Luke Kenneth Casso... | enable/disable litex irqs based on variant name |
tree | commitdiff |
2020-10-14 |
Cole Poirier | issuer_verilog.py update to use commandline args using... |
tree | commitdiff |
2020-10-12 |
Cole Poirier | litex/florent/versa_ecp5.py add arg --fpga [versa_ecp5... |
tree | commitdiff |
2020-10-12 |
Cole Poirier | fix ModuleNotFound/Import errors found when running... |
tree | commitdiff |
2020-10-12 |
Cole Poirier | add tested working fpga compile/build/load file for... |
tree | commitdiff |
2020-10-11 |
Luke Kenneth Casso... | add way to bypass PLL for ECP5 and sim |
tree | commitdiff |
2020-10-11 |
Luke Kenneth Casso... | comment out XICS/GPIO interrupt test, causes ECP5 litex... |
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2020-10-11 |
Luke Kenneth Casso... | record commands for building ECP5 |
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2020-10-11 |
Luke Kenneth Casso... | litex sim.py operational |
tree | commitdiff |
2020-10-10 |
Cole Poirier | florent/versa_ecp5.py remove uneccessary imports, speci... |
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2020-10-10 |
Luke Kenneth Casso... | add debug start/stop to firmware_upload script |
tree | commitdiff |
2020-10-10 |
Luke Kenneth Casso... | add DMI status / reset to firmware upload script |
tree | commitdiff |
2020-10-10 |
Luke Kenneth Casso... | add first version of firmware uploader |
tree | commitdiff |
2020-10-09 |
Luke Kenneth Casso... | use libresoc version of c4m-jtag repo |
tree | commitdiff |
2020-10-09 |
Luke Kenneth Casso... | drop in "undefined" function into ISAcaller namespace |
tree | commitdiff |
2020-10-09 |
Luke Kenneth Casso... | rename undef to undefined (preserving the fact that... |
tree | commitdiff |
2020-10-09 |
Luke Kenneth Casso... | missing yields in JTAG pads test to allow settling |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | finish converting mul tests to use common code |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | working on splitting out common mul pipe test code |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | add carry handling to pia_res_to_output |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | move pia_res_to_output to common test helpers |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | move mul pipe ilang test to separate file |
tree | commitdiff |
2020-10-09 |
Jacob Lifshay | add undef() |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | missing yields in JTAG pads test to allow settling |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | minor icache cleanup |
tree | commitdiff |
2020-10-08 |
Cole Poirier | second attempt at https://bugs.libre-soc.org/show_bug... |
tree | commitdiff |
2020-10-08 |
Cole Poirier | remove singleton dict per https://bugs.libre-soc.org... |
tree | commitdiff |
2020-10-08 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-10-08 |
Tobias Platen | add WIP test_pipe_caller.py for mmu |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | add incoming PortInterface to be connected to LoadStore... |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | JTAG boundary scan test 1st attempt |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | rework jtag test to use JTAG class not DMITAP |
tree | commitdiff |
2020-10-08 |
Luke Kenneth Casso... | split out jtag util functions to separate module |
tree | commitdiff |
2020-10-08 |
Cole Poirier | first attempt at 3) of |
tree | commitdiff |
2020-10-08 |
Cole Poirier | modify wb_get per 1) of https://bugs.libre-soc.org... |
tree | commitdiff |
2020-10-07 |
Tobias Platen | connect mmu_done, ldst_error, cache_paradox |
tree | commitdiff |
2020-10-07 |
Luke Kenneth Casso... | missing invert_in field from shiftrot input record |
tree | commitdiff |
2020-10-07 |
Luke Kenneth Casso... | reorder / reorganise reset signals slightly |
tree | commitdiff |
2020-10-07 |
Jacob Lifshay | fix div tests |
tree | commitdiff |
2020-10-07 |
Jacob Lifshay | Fix forgotten test_pipe_caller changes from e0b4334c7d8... |
tree | commitdiff |
2020-10-06 |
Tobias Platen | remove redunant signals |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | update comments on pimem.py |
tree | commitdiff |
2020-10-06 |
Tobias Platen | test_mmu_dcache_pi.py |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | comments |
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2020-10-06 |
Luke Kenneth Casso... | add ports function to DummyPLL |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | use pdecode2.do not pdecode2.e in test_pipe_caller... |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | skip Decode2ToOperand from PowerDecodeSubset |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | comment SRR1 mem.exception |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | add SRR1 setting for LDST memory exception trap |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | passing LDSTException over to Trap Pipeline |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | add LDSTException decode/handling in PowerDecoder2 |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | make LDSTException fields added from list of fieldnames |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | move LDSTException to mem_types |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | add LDSTException to PortInterface |
tree | commitdiff |
2020-10-06 |
Luke Kenneth Casso... | add sdr bypass routing via JTAG boundary scan |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | add divde regression test |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | add moduw regression test |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | add workaround for nmigen bug #502 |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | add modsw regression |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | add test case for divweu regression |
tree | commitdiff |
2020-10-06 |
Jacob Lifshay | print regs in hex |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | add debug / investigation print statements |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | `deepcopy` from cache instead of recreating parsers... |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | format code |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py fix ispow2() util fn per https://bugs.libre... |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | whoops fix syntax error |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | whoops fix syntax error |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | return test rather than "if test return True else False" |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2020-10-05 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py add python asserts that were a TODO commented... |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py fix formatting, mostly due to reduced indenta... |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py remove comment that contained the entirety... |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py move icache_miss WAIT_ACK FSM state into... |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py move icache_miss CLR_TAG FSM state into metho... |
tree | commitdiff |
2020-10-05 |
Cole Poirier | icache.py move icache_miss IDLE FSM state into method... |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | simplify create_args |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | Sort returned variables to make sure `overflow` is... |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | format caller.py |
tree | commitdiff |
2020-10-04 |
Jacob Lifshay | change div FSM pipeline unit to not have a combinatoria... |
tree | commitdiff |
2020-10-04 |
Luke Kenneth Casso... | significant reorg of the litex pinspecs to use pinmux... |
tree | commitdiff |
2020-10-04 |
Luke Kenneth Casso... | submodule update |
tree | commitdiff |
2020-10-04 |
Luke Kenneth Casso... | remove ls180io import |
tree | commitdiff |
2020-10-04 |
Luke Kenneth Casso... | move ls180io.py back into ls180.py |
tree | commitdiff |
2020-10-03 |
Luke Kenneth Casso... | allow i2c to be routed via JTAG |
tree | commitdiff |
2020-10-03 |
Luke Kenneth Casso... | nope. put it back and connect to platform pads in... |
tree | commitdiff |
2020-10-03 |
Luke Kenneth Casso... | move iopad litex creation to ls180soc.py |
tree | commitdiff |
2020-10-03 |
Luke Kenneth Casso... | minor reorg on JTAG, allow alternative pinset dict... |
tree | commitdiff |
2020-10-03 |
Jacob Lifshay | add regression testcase |
tree | commitdiff |
2020-10-02 |
Cole Poirier | icache.py add req_hit_way as arg to icache_comb, actual... |
tree | commitdiff |
2020-10-01 |
Cole Poirier | icache.py add missing comb signal assignments per https... |
tree | commitdiff |
2020-10-01 |
Luke Kenneth Casso... | arg CacheRam read output needs delay by 1 cycle |
tree | commitdiff |
2020-10-01 |
Luke Kenneth Casso... | do not pass cache row array around, just the current row |
tree | commitdiff |
2020-10-01 |
Luke Kenneth Casso... | revert bug in icache wishbone ack |
tree | commitdiff |
2020-10-01 |
Luke Kenneth Casso... | add clksel, pll to ls180 |
tree | commitdiff |
2020-10-01 |
Luke Kenneth Casso... | create dummy PLL block, connect up to core and clock... |
tree | commitdiff |
2020-10-01 |
Cesar Strauss | Add GTKWave document to test_compunit_fsm |
tree | commitdiff |
2020-09-30 |
Luke Kenneth Casso... | add I2C into ls180 |
tree | commitdiff |
2020-09-30 |
Luke Kenneth Casso... | add ASIC version of I2C Master |
tree | commitdiff |
next |