2020-07-05 |
Luke Kenneth Casso... | split out Decode2ToExecuteType fields involving registers |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | sigh read and write xer detection, fix spr and trap... |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | check spr1 in test spr compunit |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | get/set slow spr in spr test_pipe_caller |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add first spr compunit test (not working yet) |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add SPR test case, commented out for now |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | move valid signal out of Decode2ToExecute1Type and... |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add slow spr regfile regspec support |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | remap SPR PowerISA numbers to internal SPR enum |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | comment out SPR for now, needs SPR regfile |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | add SPR compunit |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | missing initialisation of disasm_start |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | check NIA on trap fu test |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | OP_RFID needs to read SRR0/1, OP_SC needs to write |
tree | commitdiff |
2020-07-05 |
Luke Kenneth Casso... | fix qemu trap test |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | cater for illegal instruction (generates a trap) |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add sc back in |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | comments in trap about exceptions using microcoding |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add pspec to test_core.py |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add pspec to test_core.py |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | more rename spr1/spr2 to fast1/fast2 |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | more updating spr1/spr2 to fast1/fast2 |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | more updating spr1/spr2 to fast1/fast2 |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | rename spr1/spr2 to fast1/fast2 in branch |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | update trap docstring |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | use new consts module |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | sorting out trap fastregs |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | sort out trap test reg checking |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | resolve spr names in ISACaller |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | rename spr1 to fast1 in trap data |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | sorting out fast/spr naming |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | oops initialise Function Unit class with idx |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add first cookie-cut test_trap_compunit.py |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add gitignores |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | debugging decoding of SPRs (fast) |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add spr test, add decode of spr in/out |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add spr main stage |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add spr input record |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | add SPR pipeline |
tree | commitdiff |
2020-07-04 |
Luke Kenneth Casso... | reduce steps per stage to 8 |
tree | commitdiff |
2020-07-03 |
Luke Kenneth Casso... | set only div/rem supported |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | allow flexible selection of the types of ALUs |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | fix unit tests due to change in using pspec |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | use Mock class (more convenient) |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | allow ALU names to propagate through from FU to CompUni... |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | name function unit ALUs |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | comment out DIV unit for now |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | increase combinatorial stages to 8 |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | reduce DIV radix to 1 |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | add DIV function unit to compunits |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | add trap function unit into compunits |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | add bare wishbone option to TestIssuer, sort out ports |
tree | commitdiff |
2020-07-02 |
Luke Kenneth Casso... | use single-arg pspec for TestIssuer and Core |
tree | commitdiff |
2020-07-02 |
Cesar Strauss | Present the ALU result only when valid_o is active |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | whoops missed some cases in unit test changing ALUHelpers |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | minor reorg on how Bus and Config classes are set up |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | whoops swapped trap test instructions accidentally |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | print out msr for debug |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | attempting to add SPRs to rfid test |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | add OP_SC |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | trap test check results |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | add name "test_issuer" to ilang conversion |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | add in trap compunit |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | add rfid and td/tw trap test |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | continue debugging trap pipeline |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | debugging trap pipeline |
tree | commitdiff |
2020-07-01 |
Luke Kenneth Casso... | start running trap unit test, fixing errors |
tree | commitdiff |
2020-06-30 |
Luke Kenneth Casso... | add lte ltu for use by twi and other trap functions |
tree | commitdiff |
2020-06-30 |
Luke Kenneth Casso... | add in pseudocode keyword into mdwn isa files |
tree | commitdiff |
2020-06-30 |
Luke Kenneth Casso... | code-morph on div pipeline |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | add README for fu directory |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | use correct ALUHelpers in div test |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | sort out syntax errors in div |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | first unit test for div |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | add ignore for parsetab.py |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | add autogenerated do not commit comment |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | separate out divide by zero cases |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | update OV and OV32 ISACaller flags if overflow occurs |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | attempting to add overflow setting in ISACaller |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | whoops, hex parser digits are in multiples of 4 bits |
tree | commitdiff |
2020-06-29 |
Luke Kenneth Casso... | fetch instructions from bare wishbone fetch unit |
tree | commitdiff |
2020-06-28 |
Cesar Strauss | Start with a simpler test case |
tree | commitdiff |
2020-06-28 |
Cesar Strauss | Let p.ready_o be active while the test ALU is idle |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | add cached fetch unit pass-through args |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | need args to WishboneArbiter, match data width size |
tree | commitdiff |
2020-06-28 |
Cesar Strauss | Add missing ports to the test ALU |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | read from instruction memory using FetchUnitInterface |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | add Config Fetch interface and quick unit test |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | add test instruction memory |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | add readonly option to TestMemory |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | expand instruction bus width to 64 bit, start on a... |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | parameterise minerva i-cache |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | got Pi2LSUI FSM working |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | sram address do not cut by LSBs |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | new Pi2LSUI working, using PortInterfaceBase |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | start new version of Pi2LSUI based on PortInterfaceBase |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | pass addr/mask through to PortInterfaceBase rd/wr addr |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | cleanup (remove unneeded imports) |
tree | commitdiff |
2020-06-28 |
Luke Kenneth Casso... | more code-shuffle for TestMemoryPortInterface |
tree | commitdiff |
next |