| 2020-09-04 |
Luke Kenneth Casson... | bring out XICS ICS interrupt levels so that they can...
|
commit | commitdiff | tree |
| 2020-09-04 |
Luke Kenneth Casson... | adding option to include XICS external interrupts.
|
commit | commitdiff | tree |
| 2020-09-04 |
Luke Kenneth Casson... | add means to run hello_world.bin under simulation
|
commit | commitdiff | tree |
| 2020-09-03 |
Luke Kenneth Casson... | do more on dcache conversion
|
commit | commitdiff | tree |
| 2020-09-03 |
Luke Kenneth Casson... | testing microwatt 3.bin (2.bin ok)
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | when mtocrf FXM is 0, the CR has to be set to CR7
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | fix bug in cmpli (and cmplw)
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | sign-extend lhax needs 16-64, separate from lwax which...
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | add bc ctr regression test when CTR=0 and CTR=1
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | bug in carry32 handling in OP_CMP
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | add cmpl regression test (one binary, one assembly)
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | add cmpl microwatt 1.bin test, cmpl
|
commit | commitdiff | tree |
| 2020-09-02 |
Luke Kenneth Casson... | series of extensive modifications to fix long-standing...
|
commit | commitdiff | tree |
| 2020-08-31 |
Luke Kenneth Casson... | add XER to fastregs and "construct" it in mfspr/mtspr
|
commit | commitdiff | tree |
| 2020-08-30 |
Luke Kenneth Casson... | redo OP_CMP based on microwatt. L=1 had been ignored
|
commit | commitdiff | tree |
| 2020-08-30 |
Luke Kenneth Casson... | reversal of FXM mask for one-hot selection in OP_MTCR...
|
commit | commitdiff | tree |
| 2020-08-30 |
Luke Kenneth Casson... | working on dcache.py
|
commit | commitdiff | tree |
| 2020-08-30 |
Luke Kenneth Casson... | tidyup on mul proof
|
commit | commitdiff | tree |
| 2020-08-30 |
Luke Kenneth Casson... | set mul post_stage o.ok only when needed, and fix xer_so...
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | minor code-shuffle, comments
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | slowly morphing towards using an XER bit-field selector...
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | break down XER into flags
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | add XER read via DMI interface to sim.py
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | add hack to get at XER through DMI interface
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | submodule update
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | yep disable OE for MULH64/32 and EXTS and CNTZ
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | investigating CR mtocrf / mfocrf
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | add additional CR regression tests
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | allow pseudocode numbering to decrement in for-loops
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | add wat to write out raw binary assembled programs
|
commit | commitdiff | tree |
| 2020-08-29 |
Luke Kenneth Casson... | CR FXM becomes a full mask.
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | https://bugs.libre-soc.org/show_bug.cgi?id=476
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | xer so is not being passed through to CR0
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | really bad hack to fix simulator bug in carry handling
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | augment addme test case to show bug #476
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | add addze and addme uni tests
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | incompatibility with POWER9 on mulhw/u due to lack...
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | overflow-enable does not occur on shift operations
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | oink, write_cr shiftrot record width was zero (??)
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | sorting out shift_rot to use new output stage data...
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | need to read SO if Rc=1
|
commit | commitdiff | tree |
| 2020-08-27 |
Luke Kenneth Casson... | reorg of SO handling related to CR0
|
commit | commitdiff | tree |
| 2020-08-26 |
Luke Kenneth Casson... | use sub-test in logical test_pipe_caller
|
commit | commitdiff | tree |
| 2020-08-26 |
Luke Kenneth Casson... | investigating div fsm and simulator bug
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | although shift-rot does not alter XER.so it still needs...
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | add way to capture CR from DMI in litex sim
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | add CR read to DMI interface
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | shorten using temp vars
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | add CR DMI interface
|
commit | commitdiff | tree |
| 2020-08-25 |
Luke Kenneth Casson... | add crxor unit test to qemu
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | argh, reading regfile over DMI was overlapped and corrupting...
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | add isel CR tests to run on qemu (confirmed working)
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | make it easier to select FSM/Pipe DIV unit
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | fix *another* ld-update-related timing / FSM issue
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | tidyup / shuffle after review
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | remove default parameter
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | "WAY" does not exist - range(NUM_WAYS) was intended
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | use WAY_BITS in appropriate locations
|
commit | commitdiff | tree |
| 2020-08-24 |
Luke Kenneth Casson... | reminder that the license (reflecting what is in setup...
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | update copyright notices to include additional primary...
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | add load algebraic immediate unit test
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | add algebraic ld tests lwax, lwaux
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | bring "core stopped" signal out through DMI interface
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | add in DMI "stat" loop which monitors core "stopping"
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | comment why litex sim mem map is altered
|
commit | commitdiff | tree |
| 2020-08-23 |
Luke Kenneth Casson... | multiply does not have invert_in, zero_a or invert_out
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | rename invert_a to invert_in because logical inverts RB
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | update submodule
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | load bios not 1.bin unit test
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add extra div regression tests
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add eqv to logical unit test
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add nor and nand to unit test
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | moved to div pipe temporarily in compunits
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | bug in andc and orc, complement was taking place on...
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | extend addis test
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add andc and orc tests, failing because RB needs inversion...
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | modsd bug, https://bugs.libre-soc.org/show_bug.cgi...
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | submodule update
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add regression test for nonzero addis
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add means to run microwatt test binaries
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | r0 zero tests on addis, fails
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | investigating litex sdrinit function
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add pseudo-op conversion
|
commit | commitdiff | tree |
| 2020-08-22 |
Luke Kenneth Casson... | add start of litex bios counter loop
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | remove extraneous comments
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | testing 64-bit wishbone bus after 32-bit *still* fails...
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | get litex sim enabled with 32-bit wishbone bus
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | ld/st bus reduction test operational
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | first test of down-converted load/store from 64 to...
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | first test of down-converted load/store from 64 to...
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | add in WishboneDownConvert into LoadStoreUnitInterface
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | comment formatting
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | remove default values
|
commit | commitdiff | tree |
| 2020-08-21 |
Luke Kenneth Casson... | just range(the_constant)
|
commit | commitdiff | tree |
| 2020-08-20 |
Luke Kenneth Casson... | bugfix wishbone downconvert using wb sram 64-to-32...
|
commit | commitdiff | tree |
| 2020-08-20 |
Luke Kenneth Casson... | add a wishbone upconverter
|
commit | commitdiff | tree |
| 2020-08-19 |
Luke Kenneth Casson... | rename and document fields in shift_rot proof
|
commit | commitdiff | tree |
| 2020-08-19 |
Luke Kenneth Casson... | comments in dcache
|
commit | commitdiff | tree |
| 2020-08-19 |
Luke Kenneth Casson... | more subtle interactions between wishbone bus when...
|
commit | commitdiff | tree |
| next |
projects / soc.git / search