2020-05-28 |
Luke Kenneth... | extra check on rd.req in test_alu_compunit |
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2020-05-28 |
Tobias Platen | indention |
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2020-05-28 |
Michael Nolan | Add proof for OP_SETB |
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2020-05-28 |
Michael Nolan | Update to latest wiki version |
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2020-05-28 |
Michael Nolan | Add OP_SETB |
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2020-05-28 |
Michael Nolan | Fix test_isel to properly examine registers |
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2020-05-28 |
Tobias Platen | unittest for DataMerger |
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2020-05-28 |
Tobias Platen | more fixes for DataMerger |
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2020-05-28 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-28 |
Tobias Platen | fixes for l0_cache.py |
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2020-05-28 |
Luke Kenneth... | debug-print rd/wr rel in test_alu_compunit |
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2020-05-28 |
Luke Kenneth... | add quick test of 3-operand DummyALU in MultiCompALU |
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2020-05-28 |
Luke Kenneth... | add 3rd parameter to DummyALU |
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2020-05-28 |
Luke Kenneth... | debugging test_alu_compunit.py |
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2020-05-28 |
Luke Kenneth... | start on a compunit ALU test |
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2020-05-28 |
Luke Kenneth... | update comment |
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2020-05-28 |
Luke Kenneth... | remove trick of not setting SO |
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2020-05-28 |
Cesar Strauss | Check that rd rises after issue_i, unless it's immediate |
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2020-05-28 |
Luke Kenneth... | hmm.... |
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2020-05-28 |
colepoirier | Add sync Assert for _wrports 'wen' signal in proof_regf... |
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2020-05-28 |
Cesar Strauss | Store and present parameters together with issue_i |
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2020-05-27 |
Luke Kenneth... | do not use range(0, x) - just range(x) |
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2020-05-27 |
Luke Kenneth... | remove write-block on register zero |
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2020-05-27 |
Luke Kenneth... | code-morph, add TODO on OP_RFID, OP_SC, OP_ADDPCIS |
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2020-05-27 |
colepoirier | Derive proof_regfile Driver from regfile.Register(... |
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2020-05-27 |
colepoirier | Fix indentation of regfile/formal/proof_regfile.py |
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2020-05-27 |
colepoirier | First commit of proof of regfile, not working yet |
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2020-05-27 |
Luke Kenneth... | add LD/ST pipe_data |
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2020-05-27 |
Luke Kenneth... | LogicalOutputData does not need XER.so |
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2020-05-27 |
Luke Kenneth... | comments |
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2020-05-27 |
Luke Kenneth... | remove XER.ca from logical Input Data - not needed |
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2020-05-27 |
Luke Kenneth... | cleanup logical main proof |
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2020-05-27 |
Luke Kenneth... | check cr0, ov and ca ok signals in ALU main_stage proof |
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2020-05-27 |
Luke Kenneth... | add carry-out, overflow and cr0 ok setting in ALU main_... |
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2020-05-27 |
Luke Kenneth... | add SRR0 to TrapInputData |
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2020-05-27 |
Luke Kenneth... | add links to bugreports into ALu formal proof as well |
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2020-05-27 |
Luke Kenneth... | add links to bugreports into alu output stage proof |
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2020-05-27 |
Luke Kenneth... | check reg output Data.ok in shift_rot formal proof |
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2020-05-27 |
Luke Kenneth... | rename CROutputData.cr_o to just CROutputData.cr |
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2020-05-27 |
Luke Kenneth... | test Data.ok for cr output and full cr output |
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2020-05-27 |
Luke Kenneth... | assign and test on Data, TODO add Data.ok checking... |
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2020-05-27 |
Michael Nolan | Fix bug in alu main stage proof |
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2020-05-27 |
Cesar Strauss | Move test case parameters to an "operation" member... |
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2020-05-27 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-27 |
Tobias Platen | elaborate function for DataMerger |
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2020-05-27 |
Cesar Strauss | Remove the monitor process |
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2020-05-27 |
Luke Kenneth... | make power function unit enum bitmasked |
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2020-05-27 |
Luke Kenneth... | add extra INT regs port for now, add Fast Regfile |
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2020-05-27 |
Luke Kenneth... | added XER and CR regfiles, using new VirtualRegPort |
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2020-05-26 |
Luke Kenneth... | check assertions |
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2020-05-26 |
Luke Kenneth... | make read/write regs properly internal |
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2020-05-26 |
Luke Kenneth... | add VirtualRegPort test, seems to demonstrate it working |
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2020-05-26 |
Luke Kenneth... | remove sync (not needed) |
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2020-05-26 |
Luke Kenneth... | get score6600_multi.py working again |
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2020-05-26 |
Luke Kenneth... | redo focus of virtual reg port to do only full datawidt... |
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2020-05-26 |
Michael Nolan | Add extras from bottom of the file |
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2020-05-26 |
Michael Nolan | Rewrite proof to be more in line with what appears... |
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2020-05-26 |
Luke Kenneth... | sort-of (maybe) implemented a virtual port on top of... |
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2020-05-26 |
Luke Kenneth... | try new variant of VirtualRegFile |
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2020-05-26 |
Luke Kenneth... | use nmutil treereduce |
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2020-05-26 |
Luke Kenneth... | continue virtual regfile port |
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2020-05-26 |
Luke Kenneth... | whitespace, add commentary |
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2020-05-26 |
colepoirier | First attempt at implementing block access rd and wr... |
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2020-05-25 |
Cesar Strauss | Check that busy_o doesn't rise on its own |
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2020-05-25 |
Cesar Strauss | Implement the issue_i/busy_o protocol check. |
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2020-05-25 |
Cesar Strauss | Move process list to CompUnitParallelTest |
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2020-05-25 |
Michael Nolan | Correct polarity of shadow signal |
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2020-05-25 |
Luke Kenneth... | document shadown inversion |
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2020-05-25 |
Michael Nolan | Add link to compunit wiki page |
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2020-05-25 |
Michael Nolan | Correct property numbers, add assertions about busy |
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2020-05-25 |
Luke Kenneth... | update comments on compalu_multi.py |
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2020-05-25 |
Michael Nolan | Add assertions about go_wr and wr_rel |
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2020-05-25 |
Michael Nolan | Minor cleanup of comments |
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2020-05-25 |
Michael Nolan | Minor changes to alu_hier.py to allow it to be used... |
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2020-05-25 |
Michael Nolan | Begin working on proof for compunit/fu |
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2020-05-25 |
Luke Kenneth... | add some more stub comments |
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2020-05-25 |
Luke Kenneth... | yield blank so test passes |
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2020-05-25 |
Luke Kenneth... | add stubs |
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2020-05-25 |
Luke Kenneth... | add comments |
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2020-05-25 |
Cesar Strauss | Fix detection of busy_o inside the monitor process |
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2020-05-25 |
Cesar Strauss | Proof of concept of a parallel test |
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2020-05-25 |
Tobias Platen | fix own copy/paste error |
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2020-05-25 |
Tobias Platen | whitespace fix in docstring |
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2020-05-25 |
Luke Kenneth... | correct links in regfile docstring |
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2020-05-25 |
Luke Kenneth... | document regfiles |
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2020-05-25 |
Luke Kenneth... | argh! frickin MACos terminal expanded out to 86x30... |
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2020-05-25 |
Luke Kenneth... | add docstring |
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2020-05-25 |
Luke Kenneth... | add INT, SPR and CR regfiles |
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2020-05-25 |
Tobias Platen | refactoring (see #216 Comment 43) |
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2020-05-25 |
Tobias Platen | whitespace changes |
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2020-05-25 |
Luke Kenneth... | quick addition of zero+immed test to LDSTCompUnit |
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2020-05-25 |
Luke Kenneth... | must not do rd-req checking when both imm and zero... |
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2020-05-25 |
Tobias Platen | implement DataMerger interface |
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2020-05-25 |
Luke Kenneth... | add zero immed on LDST, untested |
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2020-05-25 |
Luke Kenneth... | comment out invalid test |
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2020-05-25 |
Luke Kenneth... | lots of greater than 80 chars |
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2020-05-25 |
Luke Kenneth... | switch out req rel if immediate enabled |
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2020-05-25 |
Cesar Strauss | Show oper_r and oper_i in the signal list, in simulation |
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2020-05-25 |
Luke Kenneth... | mention zeroing |
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2020-05-25 |
Luke Kenneth... | add links to pseudocode |
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