2021-03-06 |
Cesar Strauss | Begin to implement the Simple-V loop |
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2021-03-06 |
Cesar Strauss | Do not reset pc_changed and sv_changed at instruction end |
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2021-03-06 |
Cesar Strauss | Make the raw opcode input port of the decoder stay... |
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2021-03-06 |
Luke Kenneth... | remove blackbox attribute on SPBlock_512W64B8W |
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2021-03-06 |
Luke Kenneth... | add SPBlock_512W64B8W.v blackbox file |
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2021-03-05 |
Luke Kenneth... | remove sram4k wishbone bte/cti in litex interconnect |
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2021-03-05 |
Luke Kenneth... | litex expects wishbone "err" signals even if not used |
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2021-03-05 |
Luke Kenneth... | extend name of sram4k block with _wb suffix |
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2021-03-05 |
Tobias Platen | unit test: pass bool mmu |
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2021-03-05 |
Luke Kenneth... | add comments and more stub functions |
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2021-03-05 |
Luke Kenneth... | add segment_check function, plus quick test. |
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2021-03-05 |
Luke Kenneth... | add decode_prte function to RADIX |
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2021-03-05 |
Luke Kenneth... | add trivial LD/ST redirectors into RADIX ISACaller |
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2021-03-05 |
Cesar Strauss | Move writing of the PC state register to the issue FSM |
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2021-03-05 |
Cesar Strauss | Move the wait on "core stop" out of fetch, and into... |
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2021-03-04 |
Luke Kenneth... | removing --user from make develop |
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2021-03-04 |
Luke Kenneth... | whitespace |
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2021-03-04 |
Tobias Platen | update test_caller_radix.py |
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2021-03-04 |
Tobias Platen | ISACaller: add option mmu |
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2021-03-04 |
Luke Kenneth... | whoops microwatt already allocates SPR 720 |
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2021-03-04 |
Luke Kenneth... | add comments from gem5-experimental mmu |
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2021-03-04 |
Luke Kenneth... | add cached pgtbl0/3 |
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2021-03-04 |
Luke Kenneth... | add two functions for checking permissions, to be based... |
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2021-03-03 |
Tobias Platen | add RADIX skeleton and unit test |
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2021-03-03 |
Luke Kenneth... | add debug strings |
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2021-03-03 |
Luke Kenneth... | remove singleton pattern |
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2021-03-03 |
Luke Kenneth... | add pywriter Makefile entry |
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2021-03-03 |
Luke Kenneth... | cur_state is a global, does not have to be passed as... |
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2021-03-03 |
Luke Kenneth... | set SVSTATE in TestRunner using new TestIssuer.svstate_i |
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2021-03-03 |
Luke Kenneth... | add svstate_i to TestIssuer which mirrors pc_i |
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2021-03-02 |
Luke Kenneth... | comment out changing SPR 720 because 720 is not support... |
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2021-03-02 |
Luke Kenneth... | sort out SPR setting in MMU |
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2021-03-02 |
Luke Kenneth... | operating correctly, not directing MMU SPRs to SPR... |
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2021-03-02 |
Luke Kenneth... | must always set ok for writing out data otherwise it... |
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2021-03-01 |
Luke Kenneth... | Revert "fix Bug 607 - unnecessary code added related... |
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2021-03-01 |
Luke Kenneth... | move SVP64 RM decoder to separate module |
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2021-02-28 |
Luke Kenneth... | add additional SVP64 RM decode fields |
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2021-02-28 |
Luke Kenneth... | start on SVP64 RM Mode decoder |
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2021-02-28 |
Luke Kenneth... | more SVP64 enums |
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2021-02-28 |
Luke Kenneth... | add SVP64 RM sub-field enums |
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2021-02-28 |
Luke Kenneth... | move SVP64 Extra decoders to separate module |
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2021-02-28 |
Luke Kenneth... | fix syntax error |
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2021-02-28 |
Luke Kenneth... | move SVP64PrefixDecoder to separate module |
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2021-02-28 |
Luke Kenneth... | add PowerDecoder.no_in_vec |
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2021-02-28 |
Luke Kenneth... | add svp64_instrs to power_svp64 |
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2021-02-28 |
Tobias Platen | fix Bug 607 - unnecessary code added related to MMU... |
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2021-02-28 |
Tobias Platen | fix Bug 603 - use SPR names/numbers from sprs.csv |
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2021-02-27 |
Luke Kenneth... | use PowerDecoder2.no_out_vec instead of manual vector... |
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2021-02-27 |
Luke Kenneth... | add corresponding VL=0 unit test as from 161b7d67b... |
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2021-02-27 |
Cesar Strauss | Add traces for the new FSM |
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2021-02-26 |
Cesar Strauss | Add a vector case with VL == 0 |
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2021-02-26 |
Luke Kenneth... | comment on CoreState |
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2021-02-26 |
Luke Kenneth... | remove sv_changed input to fetch_fsm, add it to issue_f... |
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2021-02-26 |
Luke Kenneth... | moving new_svstate and update_svstate into issue FSM... |
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2021-02-26 |
Luke Kenneth... | move fetch_insn_o into issue_fsm TestIssuer |
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2021-02-26 |
Luke Kenneth... | add comments, missing that VL loop ends after execution... |
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2021-02-26 |
Cesar Strauss | Implement a decode/issue FSM between fetch and execute |
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2021-02-24 |
Tobias Platen | wb_get: write outputs to seperate logfile too |
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2021-02-24 |
Tobias Platen | update mmu testcase |
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2021-02-24 |
Tobias Platen | test_runner.py: add needed imports |
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2021-02-24 |
Luke Kenneth... | add comments explaining split |
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2021-02-24 |
Luke Kenneth... | move DecodeCROut/In (at last) out of PowerDecoderSubset... |
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2021-02-24 |
Luke Kenneth... | start making write_cr0 independent of DecodeCROut |
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2021-02-23 |
Tobias Platen | deduplicate |
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2021-02-23 |
Luke Kenneth... | add note that SVSTATE has changed, this will allow... |
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2021-02-22 |
Cesar Strauss | Fix typo when calculating PowerDecoder2.no_out_vec |
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2021-02-22 |
Luke Kenneth... | move setting of NIA into fetch FSM in TestIssuer |
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2021-02-22 |
Luke Kenneth... | whoops |
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2021-02-22 |
Luke Kenneth... | moving PC-setting (NIA) out of execute_fsm in TestIssuer |
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2021-02-22 |
Luke Kenneth... | rename inter-FSM handshake signals in TestIssuer |
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2021-02-21 |
Luke Kenneth... | err trying to put in some FSM handshake signals, gettin... |
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2021-02-21 |
Luke Kenneth... | comment for where SVSTATE FSM should go |
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2021-02-21 |
Luke Kenneth... | add CR out vector detection to PowerDecoder2 no_out_vec |
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2021-02-21 |
Cesar Strauss | The field selection function was moved to nmutil.util |
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2021-02-21 |
Cesar Strauss | Hide the register augmentation traces by default |
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2021-02-21 |
Luke Kenneth... | move execute_fsm to separate function in TestIssuer |
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2021-02-21 |
Luke Kenneth... | move fetch_fsm to separate function in TestIssuer |
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2021-02-21 |
Luke Kenneth... | add JTAG enable/disable of 4k SRAMs |
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2021-02-21 |
Cesar Strauss | The new version of "sel" is smart enough to find a... |
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2021-02-21 |
Luke Kenneth... | add comments for Mode field in SVP64Asm |
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2021-02-21 |
Luke Kenneth... | comments in SVP64RMFields |
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2021-02-21 |
Cesar Strauss | Use the new selection field function from nmutil |
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2021-02-21 |
Cesar Strauss | Use symbolic values as field sizes |
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2021-02-21 |
Cesar Strauss | Replace all hardcoded shifts into RM by usage of SVP64R... |
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2021-02-21 |
Luke Kenneth... | create SVP64CROffs consts for when SVP64 Vector-of... |
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2021-02-20 |
Luke Kenneth... | comments on sv.add. Rc=1 unit test |
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2021-02-20 |
Luke Kenneth... | add in Vectorised CRs when Rc=1 into ISACaller |
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2021-02-20 |
Luke Kenneth... | add CR1 to DecodeCRIn/Out |
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2021-02-20 |
Luke Kenneth... | add some debug checking to get_pdecode_cr_out |
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2021-02-20 |
Luke Kenneth... | add crossreference to bug #603 |
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2021-02-20 |
Luke Kenneth... | add more debug output to get_pdecode_cr_out |
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2021-02-20 |
Cesar Strauss | Actually forward the field width to field_slice() |
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2021-02-20 |
Cesar Strauss | Assemble the SV64 prefix from its subfields using SVP64... |
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2021-02-20 |
Luke Kenneth... | start on CRs in SVP64 mode |
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2021-02-20 |
Luke Kenneth... | fix SVP64Asm Rc=1 assembly |
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2021-02-20 |
Luke Kenneth... | add black-box attribute to 4k SRAM cell |
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2021-02-20 |
Cesar Strauss | Fix more MSB0 issues in comments |
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2021-02-20 |
Cesar Strauss | Replace more hardcoded constants with symbolic field... |
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2021-02-20 |
Luke Kenneth... | increment CRs based on srcstep, see what happens |
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2021-02-20 |
Luke Kenneth... | add litex wishbone interconnect to 4x 4k SRAMs |
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next |